IP Library Granted Patent US 10,431,660
Granted Patent B2
US 10,431,660 · App. 15/890,671 · Granted Oct 1, 2019

Self-limiting fin spike removal

Inventors: Kangguo Cheng (Schenectady, NY); Choonghyun Lee (Rensselaer, NY); Juntao Li (Cohoes, NY); Peng Xu (Santa Clara, CA)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L29/41791H01L21/324H01L21/76229H01L21/823431H01L29/6681H01L29/7851
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Quick Facts
Patent No.
US 10,431,660
App. No.
15/890,671
Granted
Oct 1, 2019
Kind
B2
Abstract

Provided is a method for forming a semiconductor structure. In embodiments of the invention, the method includes laterally forming a spacer on a side of the semiconductor structure. The method further includes performing a thermal anneal on the semiconductor structure. The method further includes performing an etch to remove materials formed by the thermal anneal.

Claims (27)

1. A method for forming a semiconductor structure, the method comprising:

forming a silicon fin on a silicon germanium strain relaxed buffer (SRB) layer;

laterally forming a spacer on a side of the silicon fin;

performing a thermal anneal; and

performing an etch to remove material formed by the thermal anneal;

wherein the spacer comprises germanium oxide at least partially formed on at least part of the silicon fin.

2. The method of claim 1 , wherein:

the thermal anneal converts at least part of the silicon germanium in the SRB layer to silicon oxide.

3. The method of claim 2 , wherein:

performing the etch comprises performing on isotropic etch to remove the silicon oxide.

4. The method of claim 3 , wherein:

the isotropic etch comprises a hydrofluoric acid wet etch or dry etch.

5. The method of claim 2 , wherein:

performing the etch comprises removing a water-soluble germanium oxide using a water solution.

6. The method of claim 1 , wherein:

the thermal anneal is performed in an inert gas environment.

7. The method of claim 1 , further comprising:

filling areas of the semiconductor with a shallow trench isolation area; and

performing a recess to expose one or more fins of the semiconductor structure.

8. The method of claim 1 , wherein:

the thermal anneal is performed at a temperature of approximately 450 to 700 degrees Celsius.

9. The method of claim 1 , wherein:

the thermal anneal is performed in a nitrogen atmosphere.

10. The method of claim 1 , further comprising:

placing a mask over one or more fin regions; and

performing an etch of areas of the semiconductor structure exposed by the mask;

wherein the etch is configured to remove exposed shallow trench isolation material and exposed fin material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 26, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 054528/0023 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2018
From: CHENG, KANGGUO; LEE, CHOONGHYUN; LI, JUNTAO; XU, PENG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 044855/0635 →
Continuity (1)
Related Publication 20190245049A1 · Aug 8, 2019
Cited By (1)
US 12,237,401