Apparatus and method for single temperature subthreshold factor trimming for hybrid thermal sensor
An apparatus is provided which comprises: a thermal sensor comprising one or more n-type devices or p-type devices that suffer from subthreshold factor variation, wherein the thermal sensor is to generate an output digital code representing a temperature; and a calibration circuitry coupled to the thermal sensor, wherein the calibration circuitry is to trim the effects of subthreshold factor variation from the output digital code.
1. An apparatus comprising:
a first circuitry to compare a proportional-to-absolute-temperature (PTAT) voltage and a complementary-to-absolute-temperature (CTAT) voltage;
an analog-to-digital converter (ADC) coupled to the first circuitry, wherein the ADC is to provide a digital code that is representative of a temperature;
a second circuitry to generate temperature independent first and second voltages;
a first switch coupled to a node that is to provide the CTAT voltage; and
a second switch coupled to the second circuitry and to the node providing the CTAT voltage, wherein the second switch is to provide one of the first or second voltages.
2. The apparatus of claim 1 , wherein the PTAT voltage is derived from one or more n-type devices or p-type devices in weak inversion.
3. The apparatus of claim 1 , wherein the CTAT voltage is generated by a p-n junction diode.
4. The apparatus of claim 1 comprises logic to trim the digital code for subthreshold factor variation, wherein the output of the logic is a trimmed digital code.
5. The apparatus of claim 1 comprises a finite state machine, wherein the first and second switches are controllable by the finite state machine.
6. The apparatus of claim 1 , wherein the ADC is to implement a successive approximation algorithm.
7. The apparatus of claim 1 , wherein the first circuitry is part of a thermal sensor, and wherein the secondary circuitry is part of a built-in-self-test circuitry.
8. The apparatus of claim 1 comprises:
a first memory to store the digital code during a first temperature;
a second memory to store the digital code when the second switch is closed and the first switch is open; and
a third memory to store the digital code when the second switch is opened and the first switch is closed.
9. The apparatus of claim 8 , wherein the first, second, and third memories are non-volatile memories.
10. An apparatus comprising:
a thermal sensor comprising one or more n-type devices or p-type devices that suffer from subthreshold factor variation, wherein the thermal sensor is to generate an output digital code that is representative of a temperature; and
a calibration circuitry coupled to the thermal sensor, wherein the calibration circuitry is to trim the effects of subthreshold factor variation from the output digital code.
11. The apparatus of claim 10 , wherein thermal sensor comprises:
a first circuitry to compare a proportional-to-absolute-temperature (PTAT) voltage and a complementary-to-absolute-temperature (CTAT) voltage; and
an analog-to-digital converter (ADC) coupled to the first circuitry, wherein the ADC is to provide the output digital code that is representative of the temperature.
12. The apparatus of claim 11 , wherein the PTAT voltage is derived from the one or more n-type devices or p-type devices, and wherein the CTAT voltage is generated by a p-n junction diode.
13. The apparatus of claim 11 , wherein the calibration circuitry comprises a second circuitry to generate temperature independent first and second voltages.
14. The apparatus of claim 13 , wherein the thermal sensor comprises a first switch coupled to a node that is to provide the CTAT voltage.
15. The apparatus of claim 14 , wherein the calibration circuitry comprises a second switch coupled to the second circuitry and to the node that is to provide the CTAT voltage, and wherein the second switch is to provide one of the first and second voltages.
16. The apparatus of claim 14 , wherein the calibration circuitry comprises a finite state machine, and wherein the first and second switches are controllable by the finite state machine.
17. The apparatus of claim 11 , wherein the ADC is to implement a successive approximation algorithm.
18. A system comprising:
a memory;
a processor coupled to the memory, the processor including a bandgap reference circuit which includes:
a thermal sensor comprising one or more n-type devices or p-type devices that suffer from subthreshold factor variation, wherein the thermal sensor is to generate an output digital code that is representative of a temperature; and
a calibration circuitry coupled to the thermal sensor, wherein the calibration circuitry is to trim the effects of subthreshold factor variation from the output digital code; and
a wireless interface to allow the processor to communicate with another device.
19. The system of claim 18 , wherein thermal sensor comprises:
a first circuitry to compare a proportional-to-absolute-temperature (PTAT) voltage and a complementary-to-absolute-temperature (CTAT) voltage; and
an analog-to-digital converter (ADC) coupled to the first circuitry, wherein the ADC is to provide the output digital code representing the temperature, wherein the PTAT voltage is derived from the one or more n-type devices or p-type devices, and wherein the CTAT voltage is generated by a p-n junction diode.
20. The system of claim 19 , wherein the calibration circuitry comprises a second circuitry to generate temperature independent first and second voltages, wherein the thermal sensor comprises a first switch coupled to a node that is to provide the CTAT voltage, wherein the calibration circuitry comprises a second switch coupled to the second circuitry and to the node providing the CTAT voltage, and wherein the second switch is to provide one of the first and second voltages.