IP Library Granted Patent US 11,301,257
Granted Patent B2
US 11,301,257 · App. 15/900,607 · Granted Apr 12, 2022

Computing performance and power management with firmware performance data structure

Inventors: Michael Rothman (Puyallup, WA); Robert Gough (Sherwood, OR); Mark Doran (Olympia, WA)
Assignee: Intel Corporation
G06F9/4403G06F1/26G06F1/28G06F1/3203G06F1/324G06F1/3234G06F1/3275G06F1/3296G06F9/22G06F9/44G06F9/4401G06F9/445G06F9/4418G06F11/3024G06F11/3409G06F11/3664G06F11/3672G06F11/3688G06F16/2282G06F1/206G06F1/32G06F9/3012G06F9/30098G06F9/384G06F11/3447G06F11/3466G06F15/7871G06F2119/06G06F2209/501Y02D10/00
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Quick Facts
Patent No.
US 11,301,257
App. No.
15/900,607
Granted
Apr 12, 2022
Kind
B2
Abstract

In some embodiments, a PPM interface for a computing platform may be provided with functionality to facilitate, to an OS through the PPM interface, firmware performance data.

Claims (51)

1. A computing platform comprising:

a memory to store firmware boot program; and

a processor to execute the firmware boot program,

wherein the memory is to further store instructions to maintain a firmware basic boot performance table that includes a header and two or more performance records, wherein respective ones of the two or more performance records include:

timer information associated with final operating system (OS) loader activity; and

data associated with starting and ending boot time information.

2. The computing platform of claim 1 , wherein:

the one or more performance records comprise a timer value logged at a beginning of a firmware image execution.

3. The computing platform of claim 1 , wherein:

the one or more performance records comprise a timer value logged immediately prior to loading an operating system (OS) boot loader into the memory.

4. The computing platform of claim 1 , wherein:

the one or more performance records comprise a timer value logged immediately prior to launching a currently loaded operating system (OS) boot loader image.

5. The computing platform of claim 1 , wherein:

the one or more performance records comprise a timer value logged at a point where an operating system (OS) loader calls an ExitBootServices function for Unified Extensible Firmware Interface (UEFI) compatible firmware.

6. The computing platform of claim 1 , wherein:

the one or more performance records comprises a timer value logged at a point immediately prior to an operating system (OS) loader gaining control back from an ExitBootServices function for Unified Extensible Firmware Interface (UEFI) compatible firmware.

7. The computing platform of claim 1 , wherein:

the memory is to further store instructions to maintain a firmware performance data table (FPDT) structure.

8. The computing platform of claim 7 , wherein:

the FPDT structure is to include a firmware basic boot performance pointer record containing a pointer to the firmware basic boot performance table.

9. The computing platform of claim 1 , wherein:

the memory comprises a memory space to store the one or more performance records; and

an Operating System (OS) is prohibited from altering the memory space.

10. An apparatus, comprising:

a computer platform having firmware including Advanced Configuration and Power Interface (ACPI) components to maintain a firmware basic boot performance data record structure that includes a header and two or more performance records, wherein respective ones of the two or more performance records include:

timer information associated with final operating system (OS) loader activity; and

data associated with starting and ending boot time information; and

a memory to store the firmware basic boot performance data record structure.

11. The apparatus of claim 10 , wherein:

the ACPI components is to maintain a firmware performance data table (FPDT) structure that is to include a record containing a pointer to the firmware basic boot performance data record structure.

12. The apparatus of claim 10 , wherein:

an Operating System (OS) is to access the firmware performance data from the firmware basic boot performance data record structure.

13. The apparatus of claim 10 , wherein:

the firmware performance data is to track one or more firmware boot parameters during a boot process.

14. The apparatus of claim 10 , further comprising:

a processor coupled to the memory.

15. Non-transitory computer-readable storage media to store instructions that, when executed by a processor, cause the processor to perform a method comprising:

storing firmware boot program in a memory;

executing the firmware boot program; and

maintaining a firmware basic boot performance table that includes a header and one two or more performance records, wherein respective ones of the two or more performance records include:

timer information associated with final operating system (OS) loader activity; and

data associated with starting and ending boot time informationwherein the header comprises a length of the firmware basic boot performance table.

16. The non-transitory computer-readable storage media of claim 15 , wherein the one or more performance records comprise:

a timer value logged at a beginning of a firmware image execution;

a timer value logged immediately prior to loading an operating system (OS) boot loader into the memory;

a timer value logged immediately prior to launching a currently loaded operating system (OS) boot loader image;

a timer value logged at a point where an operating system (OS) loader calls an ExitBootServices function for Unified Extensible Firmware Interface (UEFI) compatible firmware; and/or

a timer value logged at a point immediately prior to an operating system (OS) loader gaining control back from an ExitBootServices function for Unified Extensible Firmware Interface (UEFI) compatible firmware.

17. The non-transitory computer-readable storage media of claim 15 to store instructions that, when executed by the processor, cause the processor to perform the method comprising:

maintaining a firmware performance data table (FPDT) structure.

18. The non-transitory computer-readable storage media of claim 17 , wherein the FPDT structure is to include a firmware basic boot performance pointer record containing a pointer to the firmware basic boot performance table.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →