Memory device
View Patent ↗A memory device according to an embodiment includes a first conductive layer; a second conductive layer; a ferroelectric layer provided between the first conductive layer and the second conductive layer and containing hafnium oxide; a paraelectric layer provided between the first conductive layer and the ferroelectric layer and containing a first oxide; and an oxide layer provided between the paraelectric layer and the ferroelectric layer and containing a second oxide having an oxygen area density lower than an oxygen area density of the first oxide.
1. A memory device comprising:
a first conductive layer;
a second conductive layer;
a ferroelectric layer provided between the first conductive layer and the second conductive layer and containing hafnium oxide;
a paraelectric layer provided between the first conductive layer and the ferroelectric lay and containing a first oxide; and
an oxide layer provided between the paraelectric layer and the ferroelectric layer, the oxide layer being in contact with the paraelectric layer and containing a second oxide having an oxygen area density lower than an oxygen area density of the first oxide.
2. The memory device according to claim 1 , wherein the first oxide is either silicon oxide or aluminum oxide.
3. The memory device according to claim 1 , wherein a work function of the first conductive layer is greater than a work function of the second conductive layer.
4. The memory device according to claim 1 , wherein the hafnium oxide contained in the ferroelectric layer includes third orthorhombic hafnium oxide.
5. The memory device according to claim 1 , wherein the hafnium oxide contained in the ferroelectric layer contains at least one element selected from the group consisting of silicon (Si), titanium (Ti), zirconium (Zr), aluminum (Al), and yttrium (Y).
6. The memory device according to claim 1 , wherein the oxide layer is in contact with the ferroelectric layer.
7. A memory device comprising:
a first conductive layer;
a second conductive layer;
a ferroelectric layer provided between the first conductive layer and the second conductive layer and containing hafnium oxide;
a paraelectric layer provided between the first conductive layer and the ferroelectric layer; and
an oxide layer provided in at least one of a first position between the paraelectric layer and the ferroelectric layer, a second position between the ferroelectric layer and the second conductive layer, and a third position between the first conductive layer and the paraelectric layer, and configured to form a dipole in which the second conductive layer side is negatively charged while the first conductive layer side is positively charged.
8. The memory device according to claim 7 , wherein a work function of the first conductive layer is greater than a work function of the second conductive layer.
9. The memory device according to claim 7 , wherein the hafnium oxide contained in the ferroelectric layer includes third orthorhombic hafnium oxide.
10. The memory device according to claim 7 , wherein the hafnium oxide contained in the ferroelectric layer contains at least one element selected from the group consisting of silicon (Si), titanium (Ti), zirconium (Zr), aluminum (Al), and yttrium (Y).