Power semiconductor device with optimized field-plate design
A power semiconductor device and method for making same are disclosed. The device includes a source bonding pad and a drain bonding pad, a drain metallization structure including a drain field plate connected to the drain bonding pad, and a source metallization structure comprising a source field plate connected to the source bonding pad. At least a portion of at least one of the bonding pads is situated directly over an active area. A dimension of at least one of the field plates varies depending upon the structure adjacent to the field plate.
1. A semiconductor device comprising:
a source bonding pad;
a drain bonding pad;
a drain metallization structure comprising a drain field plate; and
a source metallization structure comprising a source field plate;
at least a portion of the source bonding pad being situated directly over an active area of the device in a first area of the device;
at least a portion of the drain bonding pad being situated directly over an active area of the device in a second area of the device;
wherein the source field plate has a first dimension positioned in the first area, and a second dimension different from the first dimension positioned in an area of the device other than the first area; and
wherein the drain field plate has a first dimension positioned in the second area, and a second dimension different from the first dimension positioned in an area of the device other than the second area.
2. The semiconductor device of claim 1 , wherein the second dimension of the source field plate is positioned in the second area, and wherein the second dimension of the drain field plate is positioned in the first area.
3. The semiconductor device of claim 2 , wherein an area of the device has no bonding pad situated directly over an active area of the device in a third area of the device, wherein the source field plate has a third dimension different from either the first dimension or the second dimension of the source field plate positioned in the third area, and wherein the drain field plate has a third dimension different from either the first dimension or the second dimension of the drain field plate positioned in the third area.
4. The semiconductor device of claim 1 , wherein a dimension of at least one of the drain field plate or the source field plate varies continuously.
5. The semiconductor device of claim 3 , wherein the first dimension of the source field plate is larger than the second dimension of the source field plate or the third dimension of the source field plate, and wherein the first dimension of the drain field plate is larger than the second dimension of the drain field plate or the third dimension of the drain field plate.
6. A method of making a semiconductor device comprising:
forming a source bonding pad;
forming a drain bonding pad;
forming a drain metallization structure comprising a drain field plate;
forming a source metallization structure comprising a source field plate;
situating at least a portion of the source bonding pad directly over an active area of the device in a first area of the device;
situating at least a portion of the drain bonding pad directly over an active area of the device in a first area of the device; and
positioning a portion of the source field plate having a first dimension in the first area, and positioning a portion of the source field plate having a second dimension different from the first dimension in an area of the device other than the first area; and
positioning a portion of the drain field plate having a first dimension in the second area, and positioning a portion of the drain field plate having a second dimension different from the first dimension in an area of the device other than the second area.
7. The method of claim 6 , further comprising positioning the second dimension of the source field plate in the second area, and positioning the second dimension of the drain field plate in the first area.
8. The method of claim 7 , wherein an area of the device has no bonding pad situated directly over an active area of the device in a third area; wherein the source field plate has a third dimension different from either the first dimension or the second dimension of the source field plate, and further comprising positioning the third dimension of the source field plate in the third area; and wherein the drain field plate has a third dimension different from either the first dimension or the second dimension of the drain field plate, and further comprising positioning the third dimension of the drain field plate in the third area.
9. The method of claim 6 , wherein a dimension of at least one of the drain field plate or the source field plate varies continuously.
10. The method of claim 8 , further comprising forming the first dimension of the source field plate to be larger than the second dimension of the source field plate or the third dimension of the source field plate, and forming the first dimension of the drain field plate to be larger than the second dimension of the drain field plate or the third dimension of the drain field plate.