Thin film transistor and manufacturing method thereof
A thin film transistor including a flexible substrate, a semiconductor layer, a first gate, and a first gate dielectric layer is provided. The semiconductor layer is located on the flexible substrate. The first gate is located on the flexible substrate and corresponds to a portion of the semiconductor layer. The first gate dielectric layer is located between the first gate and the semiconductor layer. The first gate dielectric layer is in contact with the semiconductor layer, and the hydrogen atom concentration of the first gate dielectric layer is less than 6.5×10 20 atoms/cm 3 . A method of manufacturing the thin film transistor is also provided.
1. A thin film transistor, comprising:
a flexible substrate;
a semiconductor layer, located on the flexible substrate, wherein a material of the semiconductor layer comprises a polysilicon material;
a first gate, located over a portion of the semiconductor layer;
a first gate dielectric layer, located between the first gate and the semiconductor layer, the first gate dielectric layer being in contact with the semiconductor layer, a hydrogen atom concentration of the first gate dielectric layer being less than 6.5×10 20 atoms/cm 3 , wherein the semiconductor layer is located between the flexible substrate and the first gate, and the thin film transistor is capable of being bended to have a minimum bending radius of 1 mm; and
a second gate, wherein the semiconductor layer is located between the first gate and the second gate.
2. The thin film transistor of claim 1 , further comprising a second gate dielectric layer located between the first gate and the first gate dielectric layer, a hydrogen atom concentration of the second gate dielectric layer being greater than 6.5×10 20 atoms/cm 3 .
3. The thin film transistor of claim 1 , wherein a material of the first gate dielectric layer comprises silicon oxide, silicon nitride, or a combination thereof.
4. The thin film transistor of claim 1 , further comprising: a source and a drain respectively coupled to opposite ends of the semiconductor layer.
5. A manufacturing method of a thin film transistor, comprising:
forming a second gate on a flexible substrate;
forming a semiconductor layer on the flexible substrate, wherein a material of the semiconductor layer comprises a polysilicon material, the second gate is formed before forming the semiconductor layer, and the semiconductor layer is formed on the second gate;
forming a first gate dielectric layer on the semiconductor layer, the first gate dielectric layer being in contact with the semiconductor layer, a hydrogen atom concentration of the first gate dielectric layer being less than 6.5×10 20 atoms/cm 3 ; and
forming a first gate on the first gate dielectric layer, the first gate corresponding to a portion of the semiconductor layer, wherein the thin film transistor is capable of being bended to have a minimum bending radius of 1 mm.
6. The manufacturing method of the thin film transistor of claim 5 , further comprising:
forming a second gate dielectric layer on the first gate dielectric layer before forming the first gate, a hydrogen atom concentration of the second gate dielectric layer being greater than 6.5×10 20 atoms/cm 3 , the first gate being formed on the second gate dielectric layer.
7. The manufacturing method of the thin film transistor of claim 5 , wherein a method of forming the first gate dielectric layer comprises plasma-enhanced chemical vapor deposition, and a ratio of an inert gas flow to a total process gas flow of the plasma-enhanced chemical vapor deposition for forming the first gate dielectric layer is from 0.5 to 0.7.
8. The manufacturing method of the thin film transistor of claim 5 , wherein a deposition rate of forming the first gate dielectric layer is from 2.5 Å/sec to 3.5 Å/sec.
9. The manufacturing method of the thin film transistor of claim 5 , further comprising: forming a source and a drain respectively coupled to opposite ends of the semiconductor layer.
10. The thin film transistor of claim 1 , wherein a difference between a threshold voltage variation of the thin film transistor with a minimum bending radius of 1 mm and a threshold voltage variation of the thin film transistor that is not bended is below 0.05 volt.
11. The manufacturing method of the thin film transistor of claim 5 , wherein a difference between a threshold voltage variation of the thin film transistor with a minimum bending radius of 1 mm and a threshold voltage variation of the thin film transistor that is not bended is below 0.05 volt.
12. The manufacturing method of the thin film transistor of claim 5 , wherein a material of the first gate dielectric layer comprises silicon oxide, silicon nitride, or a combination thereof.
13. The manufacturing method of the thin film transistor of claim 5 , wherein a process temperature of the step of forming the semiconductor layer on the flexible substrate is below 600 degrees Celsius.
14. A manufacturing method of a thin film transistor, comprising:
forming a semiconductor layer on a flexible substrate, wherein a material of the semiconductor layer comprises a polysilicon material;
forming a first gate dielectric layer on the semiconductor layer, the first gate dielectric layer being in contact with the semiconductor layer, a hydrogen atom concentration of the first gate dielectric layer being less than 6.5×10 20 atoms/cm 3 , wherein a deposition rate of forming the first gate dielectric layer is from 2.5 Å/sec to 3.5 Å/sec;
forming a first gate on the first gate dielectric layer, the first gate corresponding to a portion of the semiconductor layer, wherein the thin film transistor is capable of being bended to have a minimum bending radius of 1 mm.
15. The manufacturing method of the thin film transistor of claim 14 , further comprising:
forming a second gate dielectric layer on the first gate dielectric layer before forming the first gate, a hydrogen atom concentration of the second gate dielectric layer being greater than 6.5×10 20 atoms/cm 3 , the first gate being formed on the second gate dielectric layer.
16. The manufacturing method of the thin film transistor of claim 14 , wherein a method of forming the first gate dielectric layer comprises plasma-enhanced chemical vapor deposition, and a ratio of an inert gas flow to a total process gas flow of the plasma-enhanced chemical vapor deposition for forming the first gate dielectric layer is from 0.5 to 0.7.
17. The manufacturing method of the thin film transistor of claim 14 , further comprising: forming a source and a drain respectively coupled to opposite ends of the semiconductor layer.
18. The manufacturing method of the thin film transistor of claim 14 , wherein a difference between a threshold voltage variation of the thin film transistor with a minimum bending radius of 1 mm and a threshold voltage variation of the thin film transistor that is not bended is below 0.05 volt.
19. The manufacturing method of the thin film transistor of claim 14 , wherein a material of the first gate dielectric layer comprises silicon oxide, silicon nitride, or a combination thereof.
20. The manufacturing method of the thin film transistor of claim 14 , wherein a process temperature of the step of forming the semiconductor layer on the flexible substrate is below 600 degrees Celsius.