IP Library Patent Application 15919884
Patent Application
App. No. 15/919,884

Coarse Grid Design Methods and Structures

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Quick Facts
Patent No.
US None
App. No.
15/919,884
Abstract

A layer of a mask material is deposited on a substrate. A beam of energy is scanned across the mask material in a rasterized linear pattern and in accordance with a scan pitch that is based on a pitch of conductive structure segments to be formed on the substrate. The beam of energy is defined to transform the mask material upon which the beam of energy is incident into a removable state. During scanning the beam of energy across the mask material, the beam of energy is turned on at locations where a conductive structure is to be formed on the substrate, and the beam of energy is turned off at locations where a conductive structure is not to be formed on the substrate.

Claims (32)

1 . A semiconductor device, comprising:

a first gate line formed to extend lengthwise in a first direction, the first gate line having a first width measured in a second direction perpendicular to the first direction;

a second gate line formed to extend lengthwise in the first direction, the second gate line having a second width measured in the second direction perpendicular to the first direction, the second width different than the first width; and

a third gate line formed to extend lengthwise in the first direction, the third gate line having a third width measured in the second direction perpendicular to the first direction, the third width substantially equal to the first width,

wherein the second gate line is positioned between the first gate line and the third gate line, wherein the second gate line is separated from the first gate line by a first separation distance as measured in the second direction, and wherein the second gate line is separated from the third gate line by a second separation distance as measured in the second direction, wherein the second separation distance is substantially equal to the first separation distance.

2 . The semiconductor device as recited in claim 1 , wherein the first gate line has a first overall length as measured in the first direction, wherein the second gate line has a second overall length as measured in the first direction, wherein the second overall length is less than the first overall length.

3 . The semiconductor device as recited in claim 2 , wherein the second overall length is less than one-half of the first overall length.

4 . The semiconductor device as recited in claim 2 , wherein the third gate line has a third overall length as measured in the first direction, wherein the third overall length is less than the second overall length.

5 . The semiconductor device as recited in claim 4 , wherein a difference between the third overall length and the second overall length is at least as large as a metal- 1 pitch.

6 . The semiconductor device as recited in claim 2 , further comprising:

a fourth gate line formed to extend lengthwise in the first direction, the fourth gate line having a fourth width measured in the second direction perpendicular to the first direction, the fourth width substantially equal to the first width, wherein a lengthwise centerline of the fourth gate line is substantially aligned with a lengthwise centerline of the third gate line.

7 . The semiconductor device as recited in claim 6 , wherein a spacing between the third gate line and the fourth gate line as measured in the first direction is substantially equal to one-half of a metal- 1 pitch.

8 . The semiconductor device as recited in claim 6 , wherein a first end of the second gate line is substantially aligned with a first end of the fourth gate line in the second direction.

9 . The semiconductor device as recited in claim 6 , further comprising:

a fifth gate line formed to extend lengthwise in the second direction, the fifth gate line physically connected to the second gate line, the fifth gate line physically connected to the fourth gate line.

10 . The semiconductor device as recited in claim 9 , wherein the fifth gate line has a fifth width measured in the first direction perpendicular to the second direction, wherein the fifth width is substantially equal to a spacing between the third gate line and the fourth gate line as measured in the first direction.

11 . The semiconductor device as recited in claim 10 , wherein the fifth width is substantially equal to one-half of a metal- 1 pitch.

12 . The semiconductor device as recited in claim 10 , wherein the fifth width is less than the fourth width.

13 . The semiconductor device as recited in claim 9 , wherein a first end of the fifth gate line is substantially aligned with a first side of the second gate line in the first direction.

14 . The semiconductor device as recited in claim 13 , wherein a first side of the fifth gate line is substantially aligned with a first end of the fourth gate line in the second direction.

15 . The semiconductor device as recited in claim 9 , further comprising:

a sixth gate line formed to extend lengthwise in the first direction, the sixth gate line having a sixth width measured in the second direction perpendicular to the first direction, the sixth width substantially equal to the second width.

16 . The semiconductor device as recited in claim 15 , wherein a lengthwise centerline of the sixth gate line is substantially aligned with a lengthwise centerline of the second gate line.

17 . The semiconductor device as recited in claim 16 , wherein the sixth gate line is positioned between the first gate line and the fourth gate line.

18 . The semiconductor device as recited in claim 17 , wherein a spacing between the sixth gate line and the fifth gate line as measured in the first direction is substantially equal to one-half of a metal- 1 pitch.

19 . The semiconductor device as recited in claim 17 , wherein the sixth gate line is separated from the first gate line by a third separation distance as measured in the second direction, wherein the sixth gate line is separated from the fourth gate line by a fourth separation distance as measured in the second direction, wherein the third separation distance is substantially equal to the first separation distance, wherein the fourth separation distance is substantially equal to the first separation distance.

20 . The semiconductor device as recited in claim 19 , further comprising:

a seventh gate line formed to extend lengthwise in the first direction, the seventh gate line having a seventh width measured in the second direction perpendicular to the first direction, the seventh width less than the first width of the first gate line, the seventh gate line separated from the first gate line by a fifth separation distance as measured in the second direction, the fifth separation distance substantially equal to the first separation distance.

21 . The semiconductor device as recited in claim 20 , further comprising:

an eighth gate line formed to extend lengthwise in the first direction, the eighth gate line having an eighth width measured in the second direction perpendicular to the first direction, the eighth width less than each of the third width of the third gate line and the fourth width of the fourth gate line, the eighth gate line separated from the third gate line by a sixth separation distance as measured in the second direction, the eighth gate line separated from the fourth gate line by the sixth separation distance as measured in the second direction, the sixth separation distance substantially equal to the first separation distance.

22 . The semiconductor device as recited in claim 21 , further comprising:

a ninth gate line formed to extend lengthwise in the first direction, the ninth gate line having a ninth width measured in the second direction perpendicular to the first direction, the ninth width substantially equal to the eighth width of the eighth gate line, the ninth gate line separated from the eighth gate line by a seventh separation distance as measured in the second direction, the seventh separation distance substantially equal to the first separation distance.

Assignments (2)
PATENT SECURITY AGREEMENT Recorded Apr 21, 2023
From: RPX CORPORATION
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 063424/0569 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2021
From: TELA INNOVATIONS, INC.
To: RPX CORPORATION
Reel/Frame 056602/0001 →