Power MOSFETs with superior high frequency figure-of-merit
An insulated-gate field effect transistor includes a substrate having a drift region and a source region of first conductivity type, and a base region and shielding region of second conductivity type therein. The base region forms a first P-N junction with the source region and the shielding region extends between the drift region and the base region. A transition region of first conductivity type is provided, which is electrically coupled to the drift region. The transition region extends between a first surface of the substrate and the shielding region, and forms a second P-N junction with the base region. An insulated gate electrode is provided on a first surface of the substrate. The insulated gate electrode has an electrically conductive gate therein with a drain-side sidewall extending intermediate the second P-N junction and an end of the shielding region when viewed in transverse cross-section.
1. An insulated-gate field effect transistor, comprising:
a substrate having a semiconductor drift region of first conductivity type therein;
a semiconductor source region of first conductivity type in said substrate;
a semiconductor base region of second conductivity type in said substrate, said base region forming a first P-N junction with said source region;
a semiconductor shielding region of second conductivity type in said substrate, said shielding region extending between said drift region and said base region;
a semiconductor transition region of first conductivity type electrically coupled to said drift region, said transition region extending between a first surface of said substrate and said shielding region and forming a second P-N junction with said base region; and
an insulated gate electrode on the first surface of said substrate, said insulated gate electrode having an electrically conductive gate therein with a drain-side sidewall extending intermediate the second P-N junction and an end of said shielding region when viewed in transverse cross-section.
2. The transistor of claim 1 , further comprising a JFET region of first conductivity type extending between said drift region and the first surface.
3. The transistor of claim 2 , wherein said transition region forms a non-rectifying semiconductor junction with a first portion of said JFET region; and wherein a net first conductivity type doping concentration in said transition region is greater than a net first conductivity type doping concentration in the first portion of said JFET region.
4. The transistor of claim 3 , wherein the first portion of said JFET region extends to the first surface; and wherein the non-rectifying semiconductor junction between said transition region and the first portion of said JFET region extends to the first surface.
5. The transistor of claim 4 , wherein said transition region extends between said shielding region and the first surface, but the first portion of said JFET region does not.
6. The transistor of claim 5 , wherein said JFET region forms a fourth P-N junction with said shielding region; and wherein said transition region extends between the fourth P-N junction and the first surface.
7. The transistor of claim 1 , wherein the net first conductivity type doping concentration in a first portion of said transition region extending between the first surface and said shielding region is sufficiently high to prevent full depletion of the first portion of said transition region when the transistor is turned-off.
8. The transistor of claim 7 , wherein the first portion of said transition region forms a third P-N junction with said shielding region; and wherein a thickness (t T ) of the first portion of said transition region, as measured between the first surface and said shielding region is greater than 0.75(2V bi ε s /qN T ) 1/2 , where V bi is the built-in potential of the third P-N junction, ε s is the dielectric constant of said transition region, q is the electron charge and N T is the net first conductivity type doping concentration in said transition region.
9. The transistor of claim 8 , wherein t T is less than E c ε s /qN T , where E c is the critical electric field for breakdown in said transition region.
10. The transistor of claim 1 , further comprising a source electrode extension disposed adjacent a drain-side end of the gate and opposite said transition region; and a source electrode electrically coupled to said source region and the source electrode extension.
11. The transistor of claim 10 , wherein the source electrode extension and the gate comprise the same material.
12. The transistor of claim 11 , wherein a separation distance between the gate and the base region is equivalent to a separation distance between the source electrode extension and said transition region.
13. The transistor of claim 12 , wherein a portion of the source electrode extension extends opposite an end of said shielding region.
14. The transistor of claim 10 , wherein a portion of the source electrode extension extends opposite an end of said shielding region.
15. The transistor of claim 1 , wherein the drain-side sidewall of said insulated gate electrode extends intermediate the second P-N junction and an end of said shielding region when: (i) the drain-side sidewall, (ii) the second P-N junction, and (iii) the end of said shielding region are viewed in transverse cross-section and their lateral dimensions are compared on a common lateral scale extending parallel to the first surface of said substrate.
16. An insulated-gate field effect transistor, comprising:
a substrate having a semiconductor drift region of first conductivity type therein;
a semiconductor source region of first conductivity type in said substrate;
a semiconductor base region of second conductivity type in said substrate, said base region forming a first P-N junction with said source region;
a semiconductor shielding region of second conductivity type in said substrate, said shielding region extending between said drift region and said base region;
a semiconductor transition region of first conductivity type electrically coupled to said drift region, said transition region extending between a first surface of said substrate and said shielding region and forming a second P-N junction with said base region; and
an insulated gate electrode on the first surface of said substrate, said insulated gate electrode having an electrically conductive gate therein with a drain-side sidewall extending closer to the second P-N junction relative to a laterally extending distal end of said shielding region, when viewed in transverse cross-section.
17. The transistor of claim 16 , further comprising a JFET region of first conductivity type extending between said drift region and the first surface.
18. The transistor of claim 17 , wherein said transition region forms a non-rectifying semiconductor junction with a first portion of said JFET region; and wherein a net first conductivity type doping concentration in said transition region is greater than a net first conductivity type doping concentration in the first portion of said JFET region.
19. The transistor of claim 18 , wherein the net first conductivity type doping concentration in a first portion of said transition region extending between the first surface and said shielding region is sufficiently high to prevent full depletion of the first portion of said transition region when the transistor is turned-off.
20. The transistor of claim 19 , wherein the first portion of said transition region forms a third P-N junction with said shielding region; and wherein a thickness (t T ) of the first portion of said transition region, as measured between the first surface and said shielding region is greater than about 0.75(2V bi ε s /qN T ) 1/2 , where V bi is the built-in potential of the third P-N junction, ε s is the dielectric constant of said transition region, q is the electron charge and N T is the net first conductivity type doping concentration in said transition region.
21. The transistor of claim 20 , wherein t T is less than E c ε s /qN T , where E c is the critical electric field for breakdown in said transition region.
22. The transistor of claim 16 , wherein the drain-side sidewall of said insulated gate electrode extends closer to the second P-N junction in a lateral dimension relative to a laterally extending distal end of said shielding region, when viewed in transverse cross-section and when the lateral dimensions of: (i) the drain-side sidewall, (ii) the second P-N junction, and (iii) the distal end of said shielding region are compared on a common lateral scale extending parallel to the first surface of said substrate.