IP Library Granted Patent US 11,594,587
Granted Patent B2
US 11,594,587 · App. 15/930,650 · Granted Feb 28, 2023

Display device

Inventors: Kyoung Seok Son (Seoul, KR); Myeong Ho Kim (Hwaseong-si, KR); Jay Bum Kim (Yongin-si, KR); Seung Jun Lee (Suwon-si, KR); Seung Hun Lee (Seoul, KR); Jun Hyung Lim (Seoul, KR)
Assignee: Samsung Display Co., Ltd.
H01L27/3258H01L27/1237H01L27/1248H01L51/5281H01L51/56
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Quick Facts
Patent No.
US 11,594,587
App. No.
15/930,650
Granted
Feb 28, 2023
Kind
B2
Abstract

A display device includes a substrate, a first semiconductor layer on the substrate, a first gate insulating film on the first semiconductor layer, a first conductive layer on the first gate insulating film and including a first gate electrode and a first electrode of a capacitor connected to the first gate electrode, a second semiconductor layer on the first gate insulating film and at a different layer from the first semiconductor layer, a second gate insulating film on the first conductive layer and the second semiconductor layer, a second conductive layer on the second gate insulating film and including a second gate electrode and a second electrode of the capacitor, a second interlayer insulating film on the second conductive layer, and a third conductive layer on the second interlayer insulating film and including a first source electrode, a first drain electrode, a second source electrode, and a second drain electrode.

Claims (36)

1. A display device comprising:

a substrate;

a first semiconductor layer on the substrate;

a first gate insulating film on the first semiconductor layer;

a first conductive layer on the first gate insulating film and comprising a first gate electrode and a first electrode of a capacitor connected to the first gate electrode;

a first interlayer insulating film on the first conductive layer;

a second semiconductor layer on the first interlayer insulating film and at a different layer from the first semiconductor layer;

a second gate insulating film on the first conductive layer and the second semiconductor layer;

a second conductive layer on the second gate insulating film and comprising a second gate electrode overlapping the second semiconductor layer and a second electrode of the capacitor overlapping the first electrode of the capacitor;

a second interlayer insulating film on the second conductive layer; and

a third conductive layer on the second interlayer insulating film and comprising a first source electrode and a first drain electrode connected to the first semiconductor layer and a second source electrode and a second drain electrode connected to the second semiconductor layer,

wherein the first interlayer insulating film is between the first conductive layer and the second semiconductor layer.

2. The display device of claim 1 , wherein the second gate insulating film is between the first gate electrode and the second electrode of the capacitor and the second gate insulating film is between the second semiconductor layer and the second gate electrode.

3. The display device of claim 1 , further comprising a lower light-shielding pattern which overlaps at least a portion of the second semiconductor layer,

wherein the lower light-shielding pattern is below the second semiconductor layer.

4. The display device of claim 3 , wherein the lower light-shielding pattern is coplanar with the first semiconductor layer and comprises the same material as the first semiconductor layer.

5. The display device of claim 3 ,

wherein the first interlayer insulating film is between the lower light-shielding pattern and the second semiconductor layer.

6. The display device of claim 5 , wherein the lower light-shielding pattern comprises a metal lower light-shielding pattern that is coplanar with the first gate electrode and comprises the same material as the first gate electrode.

7. The display device of claim 1 , wherein the second semiconductor layer is above the first conductive layer.

8. The display device of claim 1 , wherein a plurality of insulating films are between the first gate electrode and the second electrode of the capacitor, and at least one of the plurality of insulating films is between the second semiconductor layer and the second gate electrode.

9. The display device of claim 3 , wherein the lower light-shielding pattern is connected to the second gate electrode or is connected to any one of the second source electrode and the second drain electrode.

10. A display device comprising:

a first transistor comprising a non-oxide semiconductor on a first layer;

a second transistor comprising an oxide semiconductor on a second layer different from the first layer that the non-oxide semiconductor is on; and

a capacitor,

wherein a first electrode of the capacitor and a gate electrode of the first transistor are formed of a first conductive layer, the first electrode of the capacitor being connected to the gate electrode of the first transistor,

wherein a gate electrode of the second transistor and a second electrode of the capacitor are formed of a second conductive layer different from the first conductive layer,

wherein a source/drain electrode of the first transistor and a source/drain electrode of the second transistor are formed of a third conductive layer different from the first conductive layer and the second conductive layer,

wherein the gate electrode of the second transistor and the second electrode of the capacitor are coplanar, and

wherein an interlayer insulating film is between the gate electrode of the first transistor and the oxide semiconductor of the second transistor.

11. The display device of claim 10 , wherein the first transistor is a p-type metal-oxide-semiconductor (PMOS) transistor and the second transistor is an n-type metal-oxide-semiconductor (NMOS) transistor, or

wherein the first transistor is an NMOS transistor and the second transistor is a PMOS transistor.

12. The display device of claim 10 , further comprising a lower light-shielding pattern overlapping at least a portion of the non-oxide semiconductor of the second transistor,

wherein the lower light-shielding pattern is below the second transistor.

13. The display device of claim 12 , wherein the lower light-shielding pattern is coplanar with the non-oxide semiconductor of the first transistor and comprises the same material as the non-oxide semiconductor of the first transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2020
From: SON, KYOUNG SEOK; KIM, MYEONG HO; KIM, JAY BUM; LEE, SEUNG JUN; LEE, SEUNG HUN; LIM, JUN HYUNG
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 052648/0395 →
Priority Claims (1)
KR 10-2019-0107175 · Aug 30, 2019 · national
Continuity (1)
Related Publication 20210066421A1 · Mar 4, 2021
Cited By (3)
US 12,349,541 US 12,369,463 US 12,477,899