IP Library Granted Patent US 11,257,712
Granted Patent B2
US 11,257,712 · App. 15/931,111 · Granted Feb 22, 2022

Source/drain contact formation methods and devices

Inventors: Cheng-Wei Chang (Hsinchu, TW); Yu-Ming Huang (Tainan, TW); Ethan Tseng (Hsinchu, TW); Ken-Yu Chang (Hsinchu, TW); Yi-Ying Liu (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L21/76856H01L21/02068H01L21/28518H01L21/76805H01L21/76843H01L21/76895H01L29/045H01L29/0847H01L29/161H01L29/41791H01L29/45H01L29/66795H01L29/7851
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,257,712
App. No.
15/931,111
Granted
Feb 22, 2022
Kind
B2
Abstract

A method includes providing a structure that includes a semiconductor substrate, an epitaxial source/drain feature over the semiconductor substrate, and one or more dielectric layers over the epitaxial source/drain feature; etching a hole into the one or more dielectric layer to expose a portion of the epitaxial source/drain feature; forming a silicide layer over the portion of the epitaxial source/drain feature; forming a conductive barrier layer over the silicide layer; and applying a plasma cleaning process to at least the conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N 2 gas and H 2 gas and is performed at a temperature that is at least 300° C.

Claims (36)

1. A method for fabricating a semiconductor device, comprising:

providing a structure that includes a semiconductor substrate, an epitaxial source/drain feature over the semiconductor substrate, and one or more dielectric layers over the epitaxial source/drain feature;

etching a hole into the one or more dielectric layers to expose a portion of the epitaxial source/drain feature;

forming a silicide layer over the portion of the epitaxial source/drain feature;

forming a conductive barrier layer over the silicide layer; and

applying a plasma cleaning process to at least the conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N 2 gas and H 2 gas and is performed at a temperature that is at least 300° C.

2. The method of claim 1 , wherein a ratio of a flow rate of the N 2 gas to a flow rate of the H 2 gas is controlled to be in a range of 0.03 to 0.28 during at least a part of the plasma cleaning process.

3. The method of claim 1 , wherein a ratio of a flow rate of the N 2 gas to a flow rate of the H 2 gas is controlled to be about 0.22 to 0.26 during the plasma cleaning process.

4. The method of claim 1 , wherein the plasma cleaning process is performed at a temperature in a range from 300° C. to 500° C.

5. The method of claim 1 , further comprising depositing a metal into the hole and over the conductive barrier layer.

6. The method of claim 5 , further comprising depositing a second conductive barrier layer over the conductive barrier layer before the depositing of the metal.

7. The method of claim 1 , wherein the plasma cleaning process is performed in a process chamber where the structure is held to an electrostatic chuck that is heated to about 380° C. to 400° C.

8. The method of claim 1 , wherein the plasma cleaning process is performed for 85 seconds to 95 seconds.

9. The method of claim 1 , wherein the plasma cleaning process uses plasma that is generated at a radio frequency ranging from 1 MHz to 5 MHz.

10. The method of claim 9 , wherein the plasma is directed to the structure at another radio frequency ranging from 10 MHz to 20 MHz during the plasma cleaning process.

11. A method for fabricating a semiconductor device, comprising:

providing a structure that includes a substrate, two semiconductor fins protruding from the substrate, a source/drain feature including silicon germanium over and connected to the two semiconductor fins, and one or more dielectric layers over the two semiconductor fins and the source/drain feature;

etching a hole into the one or more dielectric layers to expose a portion of the source/drain feature;

forming one or more conductive layers over the portion of the source/drain feature, wherein the one or more conductive layers include titanium;

performing a plasma cleaning process to the one or more conductive layers, wherein the plasma cleaning process uses plasma generated from a mixture having N 2 gas and H 2 gas and is performed at a temperature that is in a range from about 300° C. to about 400° C.; and

after the plasma cleaning process is performed, depositing a metal layer into the hole.

12. The method of claim 11 , wherein the one or more conductive layers include a titanium nitride layer.

13. The method of claim 11 , wherein a ratio of a flow rate of the N 2 gas to a flow rate of the H 2 gas is controlled to be in a range of 0.03 to 0.28 during at least a part of the plasma cleaning process while the flow rate of the N 2 gas is controlled to be 10 standard cubic centimeters per minute (sccm) or lower.

14. The method of claim 13 , wherein the ratio is controlled to be about 0.22 to 0.26.

15. The method of claim 13 , wherein the flow rate of the N 2 gas is controlled to be about 1 to 9 sccm.

16. The method of claim 11 , wherein the plasma cleaning process includes applying a radio frequency power to the plasma wherein the radio frequency power ranges from 50 W to 85 W.

17. A method for fabricating a semiconductor device, comprising:

providing a structure that includes a semiconductor substrate, an epitaxially grown source/drain over the semiconductor substrate, and one or more dielectric layers over the epitaxially grown source/drain;

etching a contact hole in the one or more dielectric layers, thereby exposing a portion of the epitaxially grown source/drain;

forming a silicide layer over the portion of the epitaxially grown source/drain exposed in the contact hole;

forming a first conductive barrier layer over the silicide layer, the first conductive barrier layer including titanium nitride;

applying a plasma cleaning process to the first conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N2 gas and H2 gas and is performed at a temperature that is at least 300° C., wherein a ratio of a flow rate of the N2 gas to a flow rate of the H2 gas is controlled to be in a range of 0.03 to 0.28 during at least a part of the plasma cleaning process; and

depositing a second conductive barrier layer into the contact hole and over the first conductive barrier layer.

18. The method of claim 17 , further comprising: depositing a metal layer into the contact hole and over the second conductive barrier layer.

19. The method of claim 17 , wherein the flow rate of the N 2 gas is controlled to be 10 standard cubic centimeters per minute (sccm) or lower and the ratio of the flow rate of the N 2 gas to the flow rate of the H 2 gas is controlled to be about 0.22 to 0.26.

20. The method of claim 17 , wherein the first conductive barrier layer is formed by a CVD process and the second conductive barrier layer is deposited by an ALD process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2020
From: CHANG, CHENG-WEI; HUANG, YU-MING; TSENG, ETHAN; CHANG, KEN-YU; LIU, YI-YING
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052652/0546 →
Continuity (1)
Related Publication 20210358804A1 · Nov 18, 2021