Multi-level pulser and related apparatus and methods
Apparatus and methods are provided directed to a device, including at least one ultrasonic transducer, a multi-level pulser coupled to the at least one ultrasonic transducer; the multi-level pulser including a plurality of input terminals configured to receive respective input voltages, an output terminal configured to provide an output voltage, and a signal path between a first input terminal and the output terminal including a first transistor having a first conductivity type coupled to a first diode and, in parallel, a second transistor having a second conductivity type coupled to a second diode.
1. An apparatus for an ultrasound device, comprising:
a level shifter comprising:
a level shifter input terminal to receive an input voltage;
a level shifter output terminal to provide an output voltage level-shifted from the input voltage;
circuitry coupled between the level shifter input terminal and the level shifter output terminal, the circuitry comprising:
a first inverter having a first inverter input terminal and a first inverter output terminal;
a capacitor having a first terminal and a second terminal;
a diode having an anode and a cathode; and
a series of at least second and third inverters, each of the second and third inverters having a power connection, the second inverter having a second inverter input terminal and a second inverter output terminal, and the third inverter having a third inverter input terminal and a third inverter output terminal;
wherein:
the first inverter input terminal is or is coupled to the level shifter input terminal;
the first inverter output terminal is coupled to the first terminal of the capacitor;
the second terminal of the capacitor is coupled to the second inverter input terminal;
the anode of the diode is coupled to the power connection;
the cathode of the diode is coupled to the second terminal of the capacitor; and
the third inverter output terminal is or is coupled to the level shifter output terminal.
2. The apparatus of claim 1 , wherein:
the first inverter comprises a positive power supply connection coupled to a first voltage and a negative power supply connection coupled to a second voltage; and
the level shifter is configured to receive either of the first voltage or the second voltage as the input voltage.
3. The apparatus of claim 1 , wherein:
each of the second and third inverters comprises a positive power supply connection coupled to a first voltage and a negative power supply connection coupled to a second voltage; and
the level shifter is configured to output, as the output voltage, a voltage that is either the first voltage or the second voltage.
4. The apparatus of claim 3 , wherein the first voltage and/or the second voltage is substantially between approximately −300 V and 300 V.
5. The apparatus of claim 1 , wherein:
each of the second and third inverters comprises a positive power supply connection coupled to a first voltage and a negative power supply connection coupled to a second voltage; and
the anode of the diode is coupled to the second voltage.
6. The apparatus of claim 1 , further comprising:
a pulser having a pulser input terminal and a pulser output terminal; and
an ultrasonic transducer having an ultrasonic transducer input terminal;
wherein:
the level shifter output terminal is coupled to the pulser input terminal; and
the pulser output terminal is coupled to the ultrasonic transducer input terminal.
7. The apparatus of claim 6 , wherein:
the pulser comprises a p-type metal-oxide-semiconductor field-effect transistor (pMOSFET); and
the series of two or more second inverters comprises an odd number of inverters.
8. The apparatus of claim 6 , wherein:
the pulser comprises a n-type metal-oxide-semiconductor field-effect transistor (nMOSFET); and
the series of two or more second inverters comprises an even number of inverters.
9. The apparatus of claim 6 , wherein the level shifter, the pulser, and the ultrasonic transducer are monolithically integrated on a single substrate.
10. The apparatus of claim 1 , wherein:
the first inverter input terminal is coupled to the level shifter input terminal; and
the third inverter output terminal is coupled to the level shifter output terminal.