Turn count decoding for multi-turn sensors
Aspects of the present disclosure relate to decoding the output of a multi-turn magnetic sensor using a successive approximation technique to detect a number of turns of a magnetic target. A decoder circuit can decode a turn count of the multi-turn magnetic sensor by obtaining measurements at nodes that are determined from values of previous measurements.
1. A system for decoding a turn count of a multi-turn magnetic sensor, the system comprising:
a multi-turn magnetic sensor comprising a magnetoresistive track; and
a decoder circuit coupled to nodes of the magnetoresistive track, the decoder circuit configured to:
detect values of a first pair of signals from a first pair of the nodes, wherein the values of the first pair of signals represent voltages at the first pair of nodes;
select a second pair of the nodes based on the values of the first pair of signals from the first pair of the nodes;
detect values of a second pair of signals from the second pair of the nodes, wherein the values of the second pair of signals represent voltages at the second pair of nodes;
determine a bit of a turn count of the multi-turn sensor based at least in part on the values of the first pair of signals; and
determine another bit of the turn count based at least in part on the values of the second pair of signals.
2. The system of claim 1 , wherein the turn count represents a number of half-turns.
3. The system of claim 1 , wherein the decoder circuit is configured to select the second pair of the nodes based on whether the values of the first pair of signals are both within a predefined range.
4. The system of claim 1 , wherein the magnetoresistive track is laid out in a shape of a spiral, and the decoder circuit is coupled to nodes on opposite sides of a line that extends through a center of the spiral.
5. The system of claim 1 , wherein the first pair of signals are voltages from half-bridge circuits of the multi-turn magnetic sensor.
6. The system of claim 1 , wherein the decoder circuit is configured to determine a most significant bit of the turn count prior to determining other bits of the turn count.
7. The system of claim 1 , wherein the system is configured to determine the turn count based on measuring signals from up to and including 2 i different nodes of the magnetoresistive track, wherein a maximum turn count of the multi-turn magnetic sensor is less than or equal to 2 i , and i is a smallest integer such that 2 i is greater than or equal to the maximum turn count.
8. The system of claim 1 , wherein the decoder circuit comprises:
a multiplexer configured to select a node from among the nodes of the magnetoresistive track;
an analog-to-digital converter configured to generate a digital representation of a signal from the node; and
a decoder logic circuit configured to determine the turn count based at least in part on the digital representation of the signal from the node.
9. The system of claim 1 , further comprising an angle sensor, wherein the decoder circuit is included in a processing circuit, and wherein the processing circuit is configured to generate position data based at least in part on the turn count and an output of the angle sensor.
10. The system of claim 1 , wherein the decoder circuit is configured to determine the bit of the turn count based at least in part on whether each of the values of the first pair of signals represents a same state.
11. A method of decoding a turn count of a multi-turn magnetic sensor that comprises a magnetoresistive track, the method comprising:
determining first values of a first pair of signals for a first pair of locations on the magnetoresistive track of the multi-turn magnetic sensor;
selecting a second pair of locations on the magnetoresistive track of the multi-turn magnetic sensor based at least in part on the first values of the first pair of signals, wherein the first values represent voltages at the first pair of locations;
determining second values of a second pair of signals for the second pair of locations on the magnetoresistive track, wherein the second values represent voltages at the second pair of locations;
decoding a bit of the turn count based at least in part on the first values of the first pair of signals; and
decoding another bit of the turn count based at least in part on the second values of the second pair of signals.
12. The method of claim 11 , wherein the second pair of the nodes is selected based on whether the first values of the first pair of signals are both within a predefined range.
13. The method of claim 11 , wherein a most significant bit of the turn count is decoded prior to determining other bits of the turn count.
14. The method of claim 11 , wherein the first pair of signals are voltages from half-bridge circuits of the multi-turn magnetic sensor, and the turn count is a half turns count.
15. The method of claim 11 , wherein the magnetoresistive track is laid out in a shape of a spiral, and the first pair of locations are on opposite sides of a line that extends through a center of the spiral.
16. A decoder circuit for decoding a turn count of a multi-turn magnetic sensor, the decoder circuit arranged to couple to nodes of a magnetoresistive track of the multi-turn magnetic sensor, the decoder circuit comprising circuitry configured to: detect values of a first pair of signals from a first pair of the nodes, wherein the values of the first pair of signals represent voltages at the first pair of nodes; select a second pair of the nodes based on the values of the first pair of signals from the first pair of the nodes; detect values of a second pair of signals from the second pair of the nodes, wherein the values of the second pair of signals represent voltages at the second pair of nodes; determine a bit of a turn count of the multi-turn sensor based at least in part on the values of the first pair of signals; and determine another bit of the turn count based at least in part on the values of the second pair of signals.
17. The decoder circuit of claim 16 , wherein the turn count represents a number of half-turns.
18. The decoder circuit of claim 16 , wherein the circuitry is configured to determine a most significant bit of the turn count prior to determining any other bit of the turn count.
19. The decoder circuit of claim 16 , wherein the circuitry comprises:
an analog-to-digital converter;
a multiplexer configured to selectively couple a node of the nodes to the analog-to-digital converter; and
a decoder logic circuit coupled to an output of the analog-to-digital converter, the decoder logic configured to determine bits of the turn count and to output the turn count.
20. The decoder circuit of claim 16 , wherein the circuitry is configured to determine the bit of the turn count based at least in part on whether each of the values of the first pair of signals represents a same state.