Stacked image sensor package
View Patent ↗Implementations of semiconductor packages may include: an image sensor; an optically transmissive transparent coating directly coupled to the image sensor; and a glass lid coupled directly coupled to the optically transmissive coating. An entire surface of the glass may be directly coupled to an entire surface of the optically transmissive adhesive coating.
1. A method for forming a semiconductor package, the method comprising:
providing a semiconductor wafer comprising a plurality of image sensors;
applying an optically transmissive adhesive coating to a first side of the semiconductor wafer;
coupling a glass wafer to the first side of the semiconductor wafer through the optically transmissive adhesive coating;
thinning the semiconductor wafer to a predetermined thickness;
forming a first plurality of through vias (TVs) in the semiconductor wafer;
forming a redistribution layer (RDL) on the second side of the semiconductor wafer;
cutting between each of the plurality of image sensors into the optically transmissive adhesive coating to form a scribe line;
coupling a second semiconductor die to the first RDL;
coupling a molding compound over at least the second semiconductor die;
forming a second plurality of TVs extending from the first RDL to a second side of the molding compound extending from a second side of the second semiconductor die to the second side of the molding compound;
forming a second redistribution layer (RDL) over the molding compound;
coupling a plurality of bumps to the second RDL; and
singulating a plurality of semiconductor packages at the scribe line.
2. The method of claim 1 , wherein applying the optically transmissive adhesive coating includes one or more layers of the optically transmissive adhesive coating.
3. The method of claim 1 , wherein the glass layer is bare glass.
4. The method of claim 1 , wherein the glass layer is coated glass.
5. The method of claim 1 , wherein the second semiconductor die comprises one of a passive device, an active device, an image sensor processor, a memory sensor, a sensor, and any combination thereof.
6. The method of claim 1 , wherein the second semiconductor die has a width that is smaller than a width of the image sensor.
7. The method of claim 1 , wherein the plurality of bumps comprise one of copper pillar and solder bumps.
8. The method of claim 1 , further comprising:
coupling a third semiconductor die to the second RDL layer;
applying a third molding compound over the third semiconductor die; and
forming a third set of through vias to electrically couple the third semiconductor die with the image sensor, the second semiconductor die, and a third redistribution layer formed on the second side of the third semiconductor die.