Direct growth of lateral III-V bipolar transistor on silicon substrate
A lateral bipolar junction transistor including an emitter region, base region and collector region laterally orientated over a type IV semiconductor substrate, each of the emitter region, the base region and the collector region being composed of a type III-V semiconductor material. A buried oxide layer is present between the type IV semiconductor substrate and the emitter region, the base region and the collector region. The buried oxide layer having a pedestal aligned with the base region.
1. A lateral bipolar junction transistor (LBJT) device comprising:
an emitter region, base region and collector region laterally orientated over a base semiconductor layer of type IV semiconductor for an SOI substrate, each of the emitter region, the base region and the collector region being composed of a type III-V semiconductor material, the emitter region and the collector region each having a sloped upper surface portion extending laterally from an outer edge of the base region to a height greater than an upper surface of the base region, wherein the emitter region, the base region and the collector region are each comprised of a different base material for said type III-V semiconductor material, the emitter and collector being epitaxial materials having a crystalline characteristics substantially matching the base region;
a buried oxide layer of the SOI substrate is present between and in direct contact with the of the base semiconductor layer of the type IV semiconductor for the SOI substrate and the emitter region, the base region and the collector region, the buried oxide layer having a pedestal aligned with the base region, wherein a lower surface of the base region is vertically offset from a lower surface of at least one of the emitter region and the collector region, wherein an epitaxial relationship is not present between either of the emitter region and the collector region and the buried oxide layer that emitter region and collector region are in direct contact with; and
a spacer dielectric layer present between the buried oxide layer and the emitter region and the collector region, the spacer dielectric layer having a separate composition than the buried oxide layer.
2. The LBJT of claim 1 , wherein the type IV semiconductor substrate is a silicon containing substrate.
3. The LBJT of claim 1 , wherein the buried oxide layer is comprised of a silicon oxide containing dielectric layer.
4. The LBJT of claim 1 , wherein an extrinsic base region is present on the base region.
5. The LBJT of claim 1 , wherein the extrinsic base region is doped to a first conductivity type and the emitter and the collector are doped to a second conductivity type.