Integrated circuits with components on both sides of a selected substrate and methods of fabrication
Novel integrated circuits (SOI ICs), and methods for making and mounting the ICs are disclosed. In one embodiment, an IC comprises a first circuit layer of the IC formed from an active layer of an SOI wafer. The first circuit layer is coupled to a first surface of buffer layer, and a second surface of the buffer layer is coupled to a selected substrate comprising an insulating material. The selected substrate may be selected, without limitation, from the following types: sapphire, quartz, silicon dioxide glass, piezoelectric materials, and ceramics. A second circuit layer of the IC are formed, coupled to a second surface of the selected substrate. In one embodiment of a mounted IC, the first circuit layer is coupled to contact pads on a package substrate via solder bumps or copper pillars. The second circuit layer is coupled to contact pads on the package substrate via wire bonds.
1. An integrated circuit including:
(a) a single insulating substrate having a first surface and a second surface;
(b) an active layer having a first surface and a second surface;
(c) a buffer layer having a first surface coupled to the second surface of the active layer, and a second, opposite surface coupled to the first surface of the single insulating substrate;
(d) a first circuit layer comprising at least one active component and/or passive component formed in and/or on the first surface of the active layer; and
(e) a second circuit layer comprising at least one active component and/or passive component formed in and/or on a second, opposite surface of the single insulating substrate;
wherein at least one of the first circuit layer and the second circuit layer includes at least one active component.
2. The invention of claim 1 , wherein the single insulating substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, silicon carbide, and alumina.
3. The invention of claim 1 , wherein the second circuit layer comprises only passive components.
4. The invention of claim 1 , wherein the second circuit layer comprises acoustic wave components.
5. The invention of claim 1 , wherein the single insulating substrate is thinned after coupling the second surface of the buffer layer to the first surface of the single insulating substrate and before the second circuit layer is formed on the second surface of the single insulating substrate.
6. The invention of claim 1 , further including contact elements formed on the first circuit layer.
7. An integrated circuit including:
(a) a single insulating substrate having a first surface and a second surface;
(b) a buffer layer having a first surface coupled to the first surface of the single insulating substrate, and a second, opposite surface;
(c) an active layer having a first surface and having a second surface coupled to the second surface of the buffer layer;
(d) a first circuit layer comprising at least one active component and/or passive component formed in and/or on the first surface of the active layer; and
(e) a second circuit layer comprising at least one active component and/or passive component formed in and/or on a separate substrate suitable for forming active component and/or passive components, wherein the second circuit layer is separated from the separate substrate and coupled to a second surface of the single insulating substrate;
wherein at least one of the first circuit layer and the second circuit layer includes at least one active component.
8. The invention of claim 7 , wherein the single insulating substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, silicon carbide, and alumina.
9. The invention of claim 7 , further including contact elements formed on the first circuit layer.
10. An integrated circuit including:
(a) a first circuit layer comprising one or more active component and/or passive components, first circuit layer interconnects, and first circuit layer contacts;
(b) a second circuit layer comprising one or more active component and/or passive components, second circuit layer interconnects, and second circuit layer contacts; and
(c) a single insulating substrate having a first surface and a second surface; and
(d) a buffer layer having a first buffer layer surface and a second buffer layer surface;
wherein the first circuit layer is originally formed in and/or on a first surface of an active layer of a silicon on insulator (SOI) substrate, the first buffer layer surface is coupled to a second surface of the active layer, the second buffer layer surface is coupled to the first surface of the single insulating substrate, and the second surface of the single insulating substrate is coupled to the second circuit layer.
11. The integrated circuit of claim 10 , wherein the single insulating substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, silicon carbide, and alumina.
12. The integrated circuit of claim 10 , wherein the second circuit layer comprises acoustic wave components.
13. The integrated circuit of claim 10 , further comprising contact elements operably coupled with the first circuit layer.
14. The integrated circuit of claim 10 , further comprising a cap layer coupled with the active layer and wherein the cap layer comprises a passivation layer.