IP Library Granted Patent US 10,983,141
Granted Patent B2
US 10,983,141 · App. 15/951,514 · Granted Apr 20, 2021

Excitation circuit, system including excitation circuit and capacitive transducer, and method

Inventors: Thierry Dominique Yves Cassagnes (Tournefeuille, FR); Joel Cameron Beckwith (Tokyo, JP); Jerome Romain Enjalbert (Tournefeuille, FR); Jalal Ouaddah (Labastidette, FR)
Assignee: NXP USA, Inc.
G01P15/125G01P21/00H03F1/26H03G1/0088B81B2201/0235G01P2015/0862
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Quick Facts
Patent No.
US 10,983,141
App. No.
15/951,514
Granted
Apr 20, 2021
Kind
B2
Abstract

A system includes a capacitive transducer, an excitation circuit, and a measuring circuit. The excitation circuit is configured to excite the capacitive transducer and the measuring circuit measures an output signal from the capacitive transducer responsive to the excitation voltage. The excitation circuit includes a voltage source for providing a first voltage in response to receipt of a supply voltage, a voltage generator coupled to the voltage source for receiving the first voltage and generating a second voltage that is greater than the supply voltage, and a control circuit coupled to the voltage source and the voltage generator. The control circuit is configured to provide any of a system ground, the first voltage, and the second voltage to first and second terminals of the capacitive transducer, and particularly, being configured to apply the system ground and the second voltage in the form of two consecutive stimuli with opposite polarities.

Claims (45)

1. An excitation circuit for a capacitive transducer, comprising:

a voltage source configured to provide a first voltage in response to receipt of a supply voltage;

a voltage generator coupled to said voltage source, said voltage generator being configured to receive said first voltage and produce a second voltage that is greater than said supply voltage; and

a control circuit coupled to said voltage source and to said voltage generator, said control circuit being configured to provide any of a system ground, said first voltage, and said second voltage to a first terminal and a second terminal of said capacitive transducer, said control circuit being configured to apply said system ground and said second voltage to said first and second terminals in the form of two consecutive stimuli with opposite polarities, wherein:

said second voltage is configured for electrical excitation of a capacitor of said capacitive transducer, said second voltage including a first noise contribution that increases as a magnitude of said second voltage increases;

said capacitive transducer is coupled to a first stage of a measuring circuit, said first stage imposing a second noise contribution onto an output signal from said capacitive transducer, said second noise contribution decreasing as said second voltage increases; and

said second voltage is configured to be a value at which said first noise contribution is approximately equivalent to said second noise contribution.

2. The excitation circuit of claim 1 , wherein said voltage source comprises a voltage regulator configured to receive said supply voltage and output said first voltage that is no greater than said supply voltage.

3. The excitation circuit of claim 1 wherein said voltage source comprises a charge pump configured to receive said supply voltage and output said first voltage, a value of said first voltage being greater than said supply voltage.

4. The excitation circuit of claim 1 , wherein said voltage generator comprises a voltage doubler configured to generate said second voltage by doubling said first voltage.

5. The excitation circuit of claim 1 wherein said voltage generator comprises a charge pump configured to output said second voltage.

6. The excitation circuit of claim 1 , wherein:

said control circuit is configured to apply said second voltage as a first stimulus of said two consecutive stimuli to a first capacitor of said capacitive transducer via said first terminal of said capacitive transducer at a first instant in time; and

said control circuit is further configured to apply said second voltage as a second stimulus of said two consecutive stimuli to a second capacitor of said capacitive transducer via said second terminal at a second instant in time, said second instant following said first instant.

7. The excitation circuit of claim 6 wherein said control circuit is further configured to apply said system ground to said second capacitor via said second terminal while said second voltage is applied to said first capacitor and to apply said system ground to said first capacitor via said first terminal while said second voltage is applied to said second capacitor.

8. The excitation circuit of claim 1 wherein said second voltage and said system ground are arranged on opposite sides of and located equidistant from said first voltage.

9. The excitation circuit of claim 1 wherein said capacitive transducer comprises an accelerometer.

10. A system comprising;

a capacitive transducer;

an excitation circuit electrically coupled with said capacitive transducer, said excitation circuit being configured to excite said capacitive transducer, said excitation circuit comprising:

a voltage source configured to provide a first voltage in response to receipt of a supply voltage;

a voltage generator coupled to said voltage source, said voltage generator being configured to receive said first voltage and generate a second voltage that is greater than said supply voltage; and

a control circuit coupled to said voltage source and to said voltage generator, said control circuit being configured to provide any of a system ground, said first voltage, and said second voltage to a first terminal and second terminal of said capacitive transducer, said control circuit being configured to apply said system ground and said second voltage to said first and second terminals in the form of two consecutive stimuli with opposite polarities; and

a measuring circuit electrically coupled with said capacitive transducer for measuring an output signal from said capacitive transducer responsive to said second voltage, wherein:

said second voltage is configured for electrical excitation of a capacitor of said capacitive transducer, said second voltage including a first noise contribution that increases as a magnitude of said second voltage increases;

said capacitive transducer is coupled to a first stage of a measuring circuit, said first stage imposing a second noise contribution onto said output signal from said capacitive transducer, said second noise contribution decreasing as said magnitude of said second voltage increases; and

said second voltage is configured to be a value at which said first noise contribution is approximately equivalent to said second noise contribution.

11. The system of claim 10 wherein:

said voltage source comprises a voltage regulator configured to receive a supply voltage and output said first voltage that is no greater than said supply voltage; and

said voltage generator comprises a charge pump configured to generate said second voltage by doubling said first voltage.

12. The system of claim 10 wherein:

said voltage source comprises a first charge pump configured to receive a supply voltage and output said first voltage, a value of said first voltage being greater than said supply voltage; and

said voltage generator comprises a second charge pump configured to generate said second voltage by doubling said first voltage.

13. A system comprising;

a capacitive transducer;

an excitation circuit electrically coupled with said capacitive transducer, said excitation circuit being configured to excite said capacitive transducer, said excitation circuit comprising:

a voltage source configured to provide a first voltage in response to receipt of a supply voltage;

a voltage generator coupled to said voltage source, said voltage generator being configured to receive said first voltage and generate a second voltage that is greater than said supply voltage; and

a control circuit coupled to said voltage source and to said voltage generator, said control circuit being configured to provide any of a system ground, said first voltage, and said second voltage to a first terminal and second terminal of said capacitive transducer, wherein:

said control circuit is configured to apply said system ground and said second voltage to said first and second terminals in the form of two consecutive stimuli with opposite polarities;

said control circuit is configured to apply said second voltage as a first stimulus of said two consecutive stimuli to a first capacitor connected to said first terminal of said capacitive transducer at a first instant in time and to apply said system ground to a second capacitor connected to said second terminal while said second voltage is applied to said first capacitor; and

said control circuit is configured to apply said second voltage as a second stimulus of said two consecutive stimuli to said second capacitor via said second terminal at a second instant in time and to apply said system ground to said first capacitor via said first terminal while said second voltage is applied to said second capacitor, said second instant following said first instant; and

a measuring circuit electrically coupled with said capacitive transducer for measuring an output signal from said capacitive transducer responsive to said second voltage.

14. The system of claim 13 wherein said measuring circuit is configured to sample a first output component of said output signal during said first instant and to sample a second output component of said output signal during said second instant, said second output component being opposite in polarity from said first output component.

15. The system of claim 14 wherein said measuring circuit is configured to invert said polarity of said second output component, and wherein after inverting said polarity of said second output component, said measuring circuit is further configured to sum said first and second output components, wherein summation of said first and second output components of said output signal substantially cancels an error signal in each of said first and second output components.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2026
From: NXP USA, INC.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 075099/0715 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2018
From: CASSAGNES, THIERRY DOMINIQUE YVES; BECKWITH, JOEL CAMERON; ENJALBERT, JEROME ROMAIN; OUADDAH, JALAL
To: NXP USA, INC.
Reel/Frame 045521/0250 →
Priority Claims (1)
EP 17305585 · May 19, 2017 · regional
Continuity (1)
Related Publication 20180335444A1 · Nov 22, 2018