Substrate processing method and device manufactured by the same
Provided is a substrate processing method that may prevent the non-uniformity of the thickness of landing pads deposited on each step in the process of selectively depositing a landing pad in a vertical NAND device having a stepped structure. The substrate processing method includes stacking, a plurality of times, a stack structure including an insulating layer and a sacrificial layer and etching the stack structure to form a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface. The method also includes forming a barrier layer on the stepped structure, forming a mask layer on the barrier layer and exposing at least a portion of the barrier layer by etching at least a portion of the mask layer with a first etching solution The method further includes etching the exposed barrier layer with a second etching solution and etching the mask layer with a third etching solution.
1. A substrate processing method comprising:
stacking a stack structure comprising an insulating layer and a sacrificial layer a plurality of times;
etching the stack structure such that the stack structure includes an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface;
forming a barrier layer on the upper surface, the lower surface, and the side surface of the stack structure to cover the stack structure;
forming a mask layer over the barrier layer on the upper surface, the lower surface, and the side surface of the stack structure to cover the barrier layer;
exposing at least a first portion of the barrier layer by etching at least a first portion of the mask layer;
etching the exposed first portion of the barrier layer; and
etching the mask layer.
2. The substrate processing method of claim 1 , wherein a thickness of a second portion of the barrier layer located on the upper surface and the lower surface of the stack structure is uniform during the exposing of the first portion of the barrier layer and during the etching of the exposed first portion of the barrier layer and the etching of the mask layer.
3. The substrate processing method of claim 1 , wherein the etching of the exposed first portion of the barrier layer comprises isotropically etching the exposed first portion of the barrier layer to form a barrier layer smaller in width than a second portion of the mask layer located on the upper surface and the lower surface of the stack structure.
4. The substrate processing method of claim 1 , wherein the exposing of the first portion of the barrier layer comprises etching the first portion of the mask layer on the side surface of the stack structure.
5. The substrate processing method of claim 1 , further comprising selectively densifying a second portion of the barrier layer located on the upper surface and the lower surface of the stack structure among the barrier layer before the forming of the mask layer.
6. The substrate processing method of claim 1 , wherein an etch rate of a second portion of the barrier layer located on the upper surface and the lower surface of the stack structure is lower than an etch rate of a third portion of the barrier layer located on the side surface of the stack structure during the etching of the exposed first portion of the barrier layer.
7. The substrate processing method of claim 1 , further comprising selectively densifying a second portion of the mask layer located on the upper surface and the lower surface of the stack structure before the exposing.
8. The substrate processing method of claim 1 , wherein:
the sacrificial layer and the barrier layer form a sacrificial word line structure,
the substrate processing method further comprises:
forming an inter-layer insulating layer on the sacrificial word line structure;
removing the sacrificial word line structure; and
forming a conductive word line structure in a corresponding space from which the sacrificial word line structure is removed,
the conductive word line structure comprises:
a first conductive layer extending toward a channel; and
a second conductive layer on the first conductive layer, and
wherein the second conductive layer has first and second sidewalls opposing each other, and wherein each of the sidewalls has a portion recessed toward the other sidewall.
9. The substrate processing method of claim 1 , wherein the stack structure has a step shape.