IP Library › Granted Patent US 10,503,411
Granted Patent B2
US 10,503,411 · App. 15/954,223 · Granted Dec 10, 2019

Data storage device and method for operating non-volatile memory

Inventor: Ying-Chun Hung (Baoshan Township, TW)
Assignee: Silicon Motion, Inc.
G06F3/0613G06F3/064G06F3/0616G06F3/0652G06F3/0679G06F3/0688G06F12/0246
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Quick Facts
Patent No.
US 10,503,411
App. No.
15/954,223
Granted
Dec 10, 2019
Kind
B2
Abstract

An optimized operating method for a non-volatile memory. A microcontroller allocates the non-volatile memory to store write data issued by a host. The microcontroller dynamically adjusts a first-writing-mode threshold. The first-writing-mode threshold value is provided for the microcontroller to determine whether to use a first writing mode to allocate the non-volatile memory to store the write data issued by the host. In comparison with the first writing mode, more bits of data are stored in one storage cell in a second writing mode.

Claims (49)

1. A data storage device, comprising:

a non-volatile memory; and

a microcontroller, allocating blocks of the non-volatile memory to store write data issued by a host,

wherein:

the microcontroller dynamically adjusts a first-writing-mode threshold;

the first-writing-mode threshold value is provided for the microcontroller to determine whether to use a first writing mode or a second writing mode to allocate the blocks of the non-volatile memory to store the write data issued by the host;

in comparison with the first writing mode, more bits of data are stored in one storage cell in the second writing mode;

when available blocks of the non-volatile memory is greater than the first-writing-mode threshold, the microcontroller programs the write data issued by the host to the non-volatile memory in the first writing mode;

when available blocks of the non-volatile memory is not greater than the first-writing-mode threshold, the microcontroller programs the write data issued by the host to the non-volatile memory in the second writing mode;

when releasing a space of the non-volatile memory by background operations, the microcontroller decreases the first-writing-mode threshold; and

the microcontroller performs the background operations without being requested to by the host.

2. The data storage device as claimed in claim 1 , wherein:

when releasing a space of the non-volatile memory by foreground operations, the microcontroller increases the first-writing-mode threshold; and

the microcontroller responds to the host by the foreground operations.

3. The data storage device as claimed in claim 1 , wherein:

the non-volatile memory is a flash memory managed in blocks;

in the first-writing mode, data is stored in single-level cells with each storage cell storing one bit of data; and

in the second-writing mode, each storage cell stores more than one bit.

4. The data storage device as claimed in claim 3 , wherein:

when using the second-writing mode to copy data stored in the first-writing mode and thereby a block is released to store subsequent write data issued by the host, the microcontroller increases the first-writing-mode threshold.

5. The data storage device as claimed in claim 3 , wherein:

when updating data and thereby a block is released, the microcontroller increases the first-writing-mode threshold.

6. The data storage device as claimed in claim 3 , wherein:

when releasing a block by garbage collection performed by background operations, the microcontroller decreases the first-writing-mode threshold; and

the microcontroller performs the background operations without being requested to by the host.

7. A method for operating a non-volatile memory, comprising:

allocating blocks of a non-volatile memory to store write data issued by a host;

dynamically adjusting a first-writing-mode threshold;

based on the first-writing-mode threshold value, determining whether to use a first writing mode or a second writing mode to allocate the blocks of the non-volatile memory to store the write data issued by the host,

wherein:

in comparison with the first writing mode, more bits of data are stored in one storage cell in the second writing mode;

when available blocks of the non-volatile memory is greater than the first-writing-mode threshold, t the write data issued by the host is programmed to the non-volatile memory in the first writing mode;

when available blocks of the non-volatile memory is not greater than the first-writing-mode threshold, the write data issued by the host is programmed to the non-volatile memory in the second writing mode;

when releasing a space of the non-volatile memory by background operations, the first-writing-mode threshold is decreased; and

the background operations are performed without being requested to by the host.

8. The method as claimed in claim 7 , further comprising:

increasing the first-writing-mode threshold when releasing a space of the non-volatile memory by foreground operations,

wherein the foreground operations are performed to respond to the host.

9. The method as claimed in claim 7 , wherein:

the non-volatile memory is a flash memory managed in blocks;

in the first-writing mode, data is stored in single-level cells with each storage cell storing one bit of data; and

in the second-writing mode, each storage cell stores more than one bit.

10. The method as claimed in claim 9 , wherein:

when using the second-writing mode to copy data stored in the first-writing mode and thereby a block is released to store subsequent write data issued by the host, the first-writing-mode threshold is increased.

11. The method as claimed in claim 9 , wherein:

when updating data and thereby a block is released, the first-writing-mode threshold is increased.

12. The method as claimed in claim 9 , further comprising:

decreasing the first-writing-mode threshold when releasing a block by garbage collection performed by background operations,

wherein the background operations are performed without being requested to by the host.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2018
From: HUNG, YING-CHUN
To: SILICON MOTION, INC.
Reel/Frame 045554/0849 →
Priority Claims (1)
TW 106123733 A · Jul 13, 2017 · national
Continuity (1)
Related Publication 20190018598A1 · Jan 17, 2019