WIRING SUBSTRATE
A wiring substrate includes an insulation layer, a first wiring layer, and a second wiring layer. The first wiring layer is embedded in the insulation layer with an upper surface of the first wiring layer exposed from the insulation layer. The second wiring layer includes a terminal portion located at a lower position than a lower surface of the insulation layer and an embedded portion embedded in the insulation layer. The wiring substrate further includes a connection via connecting the first wiring layer and the embedded portion. The insulation layer includes an extension between the embedded portion and a lower surface of the first wiring layer. The extension includes a through hole. The connection via is located in the through hole of the extension.
1 . A wiring substrate comprising:
an insulation layer;
a first wiring layer embedded in the insulation layer with an upper surface of the first wiring layer exposed from the insulation layer;
a second wiring layer including
a terminal portion located at a lower position than a lower surface of the insulation layer, and
an embedded portion embedded in the insulation layer; and
a connection via connecting the first wiring layer and the embedded portion of the second wiring layer, wherein
the insulation layer includes an extension between the embedded portion of the second wiring layer and a lower surface of the first wiring layer,
the extension of the insulation layer includes a through hole extending through the extension in a thickness-wise direction, and
the connection via is located in the through hole extending through the extension.
2 . The wiring substrate according to claim 1 , wherein
the first wiring layer includes a through hole extending through the first wiring layer in the thickness-wise direction at the same position as the through hole of the extension in a plan view, and
the connection via is integrally arranged in the through hole of the first wiring layer and the through hole of the insulation layer.
3 . The wiring substrate according to claim 2 , wherein
the connection via includes
a through portion located in the through hole of the first wiring layer, and
a connection portion located in the through hole of the insulation layer, and
the through hole of the first wiring layer and the through hole of the insulation layer have the same diameter.
4 . The wiring substrate according to claim 2 , wherein
the connection via includes
a through portion located in the through hole of the first wiring layer, and
a connection portion located in the through hole of the insulation layer, and
the through hole of the insulation layer has a diameter that is larger than a diameter of the through hole of the first wiring layer.
5 . The wiring substrate according to claim 1 , wherein the upper surface of the first wiring layer and an upper surface of the insulation layer are located at the same height.
6 . The wiring substrate according to claim 1 , wherein the upper surface of the first wiring layer is located at a lower position than an upper surface of the insulation layer.
7 . The wiring substrate according to claim 2 , wherein an upper surface of the connection via is located at a lower position than the upper surface of the first wiring layer.
8 . The wiring substrate according to claim 1 , wherein
the lower surface of the first wiring layer and a side surface of the first wiring layer that are in contact with the insulation layer are rough surfaces, and
a side surface of the embedded portion and an upper surface of the embedded portion that are in contact with the insulation layer are rough surfaces.
9 . A semiconductor device comprising:
the wiring substrate according to claim 1 ; and
at least one electronic component mounted on the wiring substrate.