Capacitance value measurement method and device

1. A capacitance value measurement method for measuring a parasitic capacitance value of an external compensation sense line of a display device,

wherein the display device comprises a display panel, a circuit board, N analog-to-digital conversion circuits, N switching circuits, and M external compensation sense lines arranged on the display panel, where each of N and M is a positive integer,

an n th switching circuit of the N switching circuits is connected to an n th analog-to-digital conversion circuit of the N analog-to-digital conversion circuits,

the n th switching circuit comprises at least one switching element,

a first end of one of the at least one switching element of the n th switching circuit is connected to one of the external compensation sense lines, and a second end of the one switching element is connected to the n th analog-to-digital conversion circuit, where n is a positive integer smaller than or equal to N,

wherein the capacitance value measurement method comprises:

acquiring a first mapping relation between temperatures of the n th analog-to-digital conversion circuit measured in advance and parasitic capacitance values of the n th analog-to-digital conversion circuit;

setting a standard temperature t 0 of one of the analog-to-digital conversion circuits; and

turning off all of the at least one switching element of the n th switching circuit other than an A th switching element, turning on the A th switching element, measuring a real-time temperature t of an analog-to-digital conversion sub-circuit of the n th analog-to-digital conversion circuit, measuring a real-time capacitance value Cn of an n th testing point, and acquiring a parasitic capacitance value CsA of the external compensation sense line connected to the A th switching element at the real-time temperature t of the analog-to-digital conversion sub-circuit in accordance with the real-time capacitance value Cn and the first mapping relation,

wherein a connection line is provided between the n th analog-to-digital conversion circuit and a second end of each of the at least one switching element of the n th switching circuit, and the n th testing point is located on the connection line, where A is a positive integer.

2. The capacitance value measurement method according to claim 1 , wherein the step of acquiring the parasitic capacitance value CsA of the external compensation sense line connected to the A th switching element at the real-time temperature t of the analog-to-digital conversion sub-circuit in accordance with the real-time capacitance value Cn and the first mapping relation comprises:

acquiring a first parasitic capacitance value Cad 1 of the n th analog-to-digital conversion circuit corresponding to the standard temperature t 0 of the analog-to-digital conversion circuit in accordance with the first mapping relation, acquiring a difference ΔC 1 between a second parasitic capacitance value of the n th analog-to-digital conversion circuit corresponding to the real-time temperature t of the analog-to-digital conversion sub-circuit and the first parasitic capacitance value Cad 1 , and determining that the parasitic capacitance value CsA of the external compensation sense line connected to the A th switching element at the real-time temperature t of the analog-to-digital conversion sub-circuit is equal to Cn−Cad 1 −ΔC 1 .

3. The capacitance value measurement method according to claim 1 , wherein the display device further comprises N detection capacitors arranged on the circuit board, a first end of an n th detection capacitor of the N detection capacitors is connected to the second end of each of a plurality of switching elements of the n th switching circuit, and a second end of the n th detection capacitor is connected to a first level input end,

wherein the step of acquiring the parasitic capacitance value CsA of the external compensation sense line connected to the A th switching element at the real-time temperature t of the analog-to-digital conversion sub-circuit in accordance with the real-time capacitance value Cn and the first mapping relation comprises:

acquiring a first parasitic capacitance value Cad 1 of the n th analog-to-digital conversion circuit corresponding to the standard temperature t 0 of the analog-to-digital conversion circuit in accordance with the first mapping relation, acquiring a difference ΔC 1 between a second parasitic capacitance value of the n th analog-to-digital conversion circuit corresponding to the real-time temperature t of the analog-to-digital conversion sub-circuit and the first parasitic capacitance value Cad 1 , and determining that the parasitic capacitance value CsA of the external compensation sense line connected to the A th switching element at the real-time temperature t of the analog-to-digital conversion sub-circuit is equal to Cn−Cad 1 −Cextn−ΔC 1 , where Cextn represents a capacitance value of the n th detection capacitor.

4. The capacitance value measurement method according to claim 2 , wherein the step of turning off all of the at least one switching element of the n th switching circuit other than the A th switching element and turning on the A th switching element comprises:

turning on a plurality of switching elements of the n th switching circuit in a time-division manner; and

in the case that one of the switching elements of the n th switching circuit has been turned on, turning off all of the switching elements of the n th switching circuit other than the switching element that has been turned on,

wherein the standard temperature t 0 of the analog-to-digital conversion circuit is a temperature of the n th analog-to-digital conversion circuit measured in the case that an a th switching element of the n th switching circuit has been turned on, a is a positive integer, and the a th switching element is one of the switching elements of the n th switching circuit which is turned on prior to turning on any other one of the switching elements of the n th switching circuit.

5. The capacitance value measurement method according to claim 2 , wherein the step of turning off all of the at least one switching element of the n th switching circuit other than the A th switching element and turning on the A th switching element comprises:

turning on a plurality of switching elements of the n th switching circuit sequentially in a time-division manner; and

in the case that one of the switching elements has been turned on, turning off all of the switching elements of the n th switching circuit other than the switching element that has been turned on,

wherein the standard temperature t 0 of the analog-to-digital conversion circuit is a temperature of the n th analog-to-digital conversion circuit measured in the case that a first switching element of the n th switching circuit has been turned on.

6. The capacitance value measurement method according to claim 2 , wherein the step of acquiring the first mapping relation between the temperatures of the n th analog-to-digital conversion circuit measured in advance and the parasitic capacitance values of the n th analog-to-digital conversion circuit comprises:

turning off all of the at least one switching element of the n th switching circuit, measuring the real-time capacitance values of the n th testing point in the case that the n th analog-to-digital conversion circuit is at different temperatures, determining the real-time capacitance values as the parasitic capacitance values of the n th analog-to-digital conversion circuit at different temperatures, and acquiring the first mapping relation between the temperatures of the n th analog-to-digital conversion circuit and the parasitic capacitance values of the n th analog-to-digital conversion circuit in accordance with the parasitic capacitance values and the corresponding temperatures.

7. The capacitance value measurement method according to claim 3 , wherein the step of acquiring the first mapping relation between the temperatures of the n th analog-to-digital conversion circuit measured in advance and the parasitic capacitance values of the n th analog-to-digital conversion circuit comprises:

turning off all of the switching elements of the n th switching circuit, measuring the real-time capacitance values of the n th testing point in the case that the n th analog-to-digital conversion circuit is at different temperatures, determining differences between the real-time capacitance values and the capacitance value of the n th detection capacitor as the parasitic capacitance values of the n th analog-to-digital conversion circuit at different temperatures, and acquiring the first mapping relation between the temperatures of the n th analog-to-digital conversion circuit and the parasitic capacitance values of the n th analog-to-digital conversion circuit in accordance with the parasitic capacitance values and the corresponding temperatures.

8. The capacitance value measurement method according to claim 2 , further comprising:

setting a standard temperature of the display panel corresponding to the external compensation sense line connected to the A th switching element of the n th switching circuit;

acquiring a capacitance difference between a parasitic capacitance value of the corresponding external compensation sense line measured at a real-time temperature of the display panel and a parasitic capacitance value of the corresponding external compensation sense line at the standard temperature of the display panel, and acquiring a second mapping relation between the capacitance difference and the real-time temperature of the display panel; and

measuring a real-time temperature t 1 at a position on the display panel spaced apart from the corresponding external compensation sense line by a distance within a predetermined range, and determining that a parasitic capacitance value C 0 of the corresponding external compensation sense line at the standard temperature of the display panel is equal to CsA−ΔC 2 , where ΔC 2 represents a capacitance difference corresponding to the real-time temperature t 1 acquired in accordance with the second mapping relation.

9. The capacitance value measurement method according to claim 3 , wherein the step of turning off all of the at least one element of the n th switching circuit other than the A th switching element and turning on the A th switching element comprises:

turning on the plurality of switching elements of the n th switching circuit in a time-division manner; and

in the case that one of the switching elements of the n th switching circuit has been turned on, turning off all of the switching elements of the n th switching circuit other than the switching element that has been turned on,

wherein the standard temperature t 0 of the analog-to-digital conversion circuit is a temperature of the n th analog-to-digital conversion circuit measured in the case that an a th switching element of the n th switching circuit has been turned on, a is a positive integer, and the a th switching element is a switching element of the n th switching circuit which is turned on prior to turning on any other one of the switching elements of the n th switching circuit.

10. The capacitance value measurement method according to claim 3 , wherein the step of turning off all of the at least one switching element of the n th switching circuit other than the A th switching element and turning on the A th switching element comprises:

turning on the plurality of switching elements of the n th switching circuit sequentially in a time-division manner; and

in the case that one of the switching elements has been turned on, turning off all of the switching elements of the n th switching circuit other than the switching element that has been turned on,

wherein the standard temperature t 0 of the analog-to-digital conversion circuit is a temperature of the n th analog-to-digital conversion circuit measured in the case that a first switching element of the n th switching circuit has been turned on.

11. A capacitance value measurement device for measuring a parasitic capacitance value of an external compensation sense line of a display device,

wherein the display device comprises a display panel, a circuit board, N analog-to-digital conversion circuits, N switching circuits, and M external compensation sense lines arranged on the display panel, where each of N and M is a positive integer,

an n th switching circuit of the N switching circuits is connected to an n th analog-to-digital conversion circuit of the N analog-to-digital conversion circuits,

the n th switching circuit comprises at least one switching element,

a first end of one of the at least one switching element of the n th switching circuit is connected to one of the external compensation sense lines, and a second end of the one switching element is connected to the n th analog-to-digital conversion circuit, where n is a positive integer smaller than or equal to N,

wherein the capacitance value measurement device comprises:

a first mapping relation acquisition circuit configured to acquire a first mapping relation between temperatures of the n th analog-to-digital conversion circuit measured in advance and parasitic capacitance values of the n th analog-to-digital conversion circuit;

a first setting circuit configured to set a standard temperature t 0 of one of the analog-to-digital conversion circuits;

a switching control circuit configured to turn off each of the at least one switching element of the n th switching circuit other than an A th switching element, and turn on the A th switching element;

a first temperature measurement circuit configured to measure a real-time temperature t of an analog-to-digital conversion sub-circuit of the n th analog-to-digital conversion circuit;

a capacitance value measurement circuit configured to measure a real-time capacitance value Cn of an n th testing point; and

a first parasitic capacitance value determination circuit configured to acquire a parasitic capacitance value CsA of the external compensation sense line connected to the A th switching element at the real-time temperature t of the analog-to-digital conversion sub-circuit in accordance with the real-time capacitance value Cn and the first mapping relation,

wherein a connection line is provided between the n th analog-to-digital conversion circuit and a second end of each of the at least one switching element of the n th switching circuit, and the n th testing point is located on the connection line, where A is a positive integer.

12. The capacitance value measurement device according to claim 11 , further comprising at least one analog-to-digital conversion chip,

wherein both the n th analog-to-digital conversion circuit and the n th switching circuit are arranged on the analog-to-digital conversion chip; or

the n th analog-to-digital conversion circuit is arranged on the analog-to-digital conversion chip and the n th switching circuit is arranged on the display panel.

13. The capacitance value measurement device according to claim 11 , wherein the first parasitic capacitance value determination circuit is further configured to:

acquire a first parasitic capacitance value Cad 1 of the n th analog-to-digital conversion circuit corresponding to the standard temperature t 0 of the analog-to-digital conversion circuit in accordance with the first mapping relation, acquire a difference ΔC 1 between a second parasitic capacitance value of the n th analog-to-digital conversion circuit corresponding to the real-time temperature t of the analog-to-digital conversion sub-circuit and the first parasitic capacitance value Cad 1 , and determine that the parasitic capacitance value CsA of the external compensation sense line connected to the A th switching element at the real-time temperature t of the analog-to-digital conversion sub-circuit is equal to Cn−Cad 1 −ΔC 1 .

14. The capacitance value measurement device according to claim 11 , wherein the display device further comprises N detection capacitors arranged on the circuit board, a first end of an n th detection capacitor of the N detection capacitors is connected to the second end of each of the at least one switching element of the n th switching circuit, and a second end of the n th detection capacitor is connected to a first level input end,

wherein the first parasitic capacitance value determination circuit is further configured to:

acquire a first parasitic capacitance value Cad 1 of the n th analog-to-digital conversion circuit corresponding to the standard temperature t 0 of the analog-to-digital conversion circuit in accordance with the first mapping relation, acquire a difference ΔC 1 between a second parasitic capacitance value of the n th analog-to-digital conversion circuit corresponding to the real-time temperature t of the analog-to-digital conversion sub-circuit and the first parasitic capacitance value Cad 1 , and determine that the parasitic capacitance value CsA of the external compensation sense line connected to the A th switching element at the real-time temperature t of the analog-to-digital conversion sub-circuit is equal to Cn−Cad 1 −Cextn−ΔC 1 , where Cextn represents a capacitance value of the n th detection capacitor.

15. The capacitance value measurement device according to claim 13 , wherein the switching control circuit is further configured to:

turn on a plurality of switching elements of the n th switching circuit in a time-division manner; and

in the case that one of the switching elements of the n th switching circuit has been turned on by the switching control circuit, turn off all of the switching elements of the n th switching circuit other than the switching element that has been turned on,

wherein the standard temperature t 0 of the analog-to-digital conversion circuit is a temperature of the n th analog-to-digital conversion circuit measured in the case that an a th switching element of the n th switching circuit has been turned on, a is a positive integer, and the a th switching element is one of the switching elements of the n th switching circuit which is turned on prior to turning on any other one of the switching elements of the n th switching circuit.

16. The capacitance value measurement device according to claim 13 , wherein the switching control circuit is further configured to:

turn on a plurality of switching elements of the n th switching circuit sequentially in a time-division manner; and

in the case that one of the switching elements of the n th switching circuit has been turned on by the switching control circuit, turn off all of the switching elements of the n th switching circuit other than the switching element that has been turned on,

wherein the standard temperature t 0 of the analog-to-digital conversion circuit is a temperature of the n th analog-to-digital conversion circuit measured in the case that a first switching element of the n th switching circuit has been turned on.

17. The capacitance value measurement device according to claim 13 , further comprising a first mapping relation detection circuit,

wherein the first mapping relation detection circuit comprises:

a second control circuit configured to turn off all of switching elements of the n th switching element;

a real-time capacitance value measurement circuit configured to measure the real-time capacitance values of the n th testing point in the case that the n th analog-to-digital conversion circuit is at different temperatures;

a parasitic capacitance value determination circuit configured to determine the real-time capacitance values as the parasitic capacitance values of the n th analog-to-digital conversion circuit at different temperatures; and

a first mapping relation detection circuit configured to acquire the first mapping relation between the temperatures of the n th analog-to-digital conversion circuit and the parasitic capacitance values of the n th analog-to-digital conversion circuit in accordance with the parasitic capacitance values and the corresponding temperatures.

18. The capacitance value measurement device according to claim 14 , further comprising a first mapping relation detection circuit,

wherein the first mapping relation detection circuit comprises:

a second control circuit configured to turn off all of switching elements of the n th switching circuit;

a real-time capacitance value measurement circuit configured to measure the real-time capacitance values of the n th testing point in the case that the n th analog-to-digital conversion circuit is at different temperatures;

a parasitic capacitance value determination circuit configured to determine differences between the real-time capacitance values and the capacitance value of the n th detection capacitor as the parasitic capacitance values of the n th analog-to-digital conversion circuit at different temperatures; and

a first mapping relation detection circuit configured to acquire the first mapping relation between the temperatures of the n th analog-to-digital conversion circuit and the parasitic capacitance values of the n th analog-to-digital conversion circuit in accordance with the parasitic capacitance values and the corresponding temperatures.

19. The capacitance value measurement device according to claim 13 , further comprising:

a second setting circuit configured to set a standard temperature of the display panel corresponding to the external compensation sense line connected to the A th switching element of the n th switching circuit;

a second mapping relation acquisition circuit configured to acquire a capacitance difference between a parasitic capacitance value of the corresponding external compensation sense line measured at a real-time temperature of the display panel and a parasitic capacitance value of the corresponding external compensation sense line at the standard temperature of the display panel, and acquire a second mapping relation between the capacitance difference and the real-time temperature of the display panel;

a second temperature measurement circuit configured to measure a real-time temperature t 1 at a position on the display panel spaced apart from the corresponding external compensation sense line by a distance within a predetermined range; and

a second parasitic capacitance value determination circuit configured to determine that a parasitic capacitance value C 0 of the corresponding external compensation sense line at the standard temperature of the display panel is equal to CsA−ΔC 2 , where ΔC 2 represents a capacitance difference corresponding to the real-time temperature t 1 acquired in accordance with the second mapping relation.

20. The capacitance value measurement device according to claim 14 , wherein the switching control circuit is further configured to:

turn on a plurality of switching elements of the n th switching circuit in a time-division manner; and

in the case that one of the switching elements of the n th switching circuit has been turned on by the switching control circuit, turn off all of the switching elements of the n th switching circuit other than the switching element that has been turned on,

wherein the standard temperature t 0 of the analog-to-digital conversion circuit is a temperature of the n th analog-to-digital conversion circuit measured in the case that an a th switching element of the n th switching circuit has been turned on, a is a positive integer, and the a th switching element is one of the switching elements of the n th switching circuit prior to turning on any other one of the switching elements of the n th switching circuit.