Semiconductor device comprising deep counter well and manufacturing mehtod thereof
View Patent ↗A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a first well, a second well, and first and second doped regions. The substrate has heavily doped and lightly doped regions. The lightly doped region is disposed over the heavily doped region. The first well is disposed in the lightly doped region. The first well has a conductive type complementary to a conductive type of the heavily doped and lightly doped regions. The second well is disposed in the substrate over the lightly doped region. A location of the first well overlaps a location of the second well. The first and the second doped regions are located in the second well within the active region, and spaced apart from each other. The first and the second doped regions have a same conductive type complementary to a conductive type of the second well.
1. A semiconductor device, comprising:
a substrate having a heavily doped region and a lightly doped region, wherein the heavily doped region and the lightly doped region have a same conductive type, and the lightly doped region is disposed over the heavily doped region;
a first well, disposed in the lightly doped region, wherein the first well has a conductive type opposite to the conductive type of the heavily doped region and the lightly doped region;
a second well, disposed in the substrate over the lightly doped region, and having an active region defined by an isolation structure, wherein a location of the first well overlaps a location of the second well; and
a first doped region and a second doped region, located in the second well within the active region, and spaced apart from each other, wherein the first doped region and the second doped region have a same conductive type, and a conductive type of the second well is opposite to the conductive type of the first and second doped regions,
wherein a top end of the first well is lower than a bottom end of the second well.
2. The semiconductor device of claim 1 , further comprising a first contact region and a second contact region disposed in the second well, wherein the first contact region and the second contact region have a same conductive type that is the same as the conductive type of the second well, and the first and second doped regions are disposed between the first contact region and the second contact region.
3. The semiconductor device of claim 2 , wherein the active region is surrounded by the isolation structure, and the first contact region and the second contact region are located outside the active region.
4. The semiconductor device of claim 1 , wherein the first well comprises a plurality of stripe-shaped sub-wells spaced apart from one another.
5. The semiconductor device of claim 4 , wherein a length of each strip-shaped sub-well is greater than a length of the active region along a same direction.
6. A semiconductor device, comprising:
a substrate having a heavily doped region and a lightly doped region, wherein the heavily doped region and the lightly doped region have a same conductive type, and the lightly doped region is disposed over the heavily doped region;
a first well, disposed in the lightly doped region, wherein the first well has a conductive type opposite to the conductive type of the heavily doped region and the lightly doped region;
a second well, disposed in the substrate over the lightly doped region, wherein the second well has an active region, the first well spans under the active region and extends over and beyond an area of the active region, and a top end of the first well is lower than a bottom end of the second well; and
a transistor, disposed in the active region, wherein the transistor comprises a gate structure disposed on the substrate, and further comprises a first doped region and a second doped region disposed in the second well, wherein the first doped region and the second doped region have a same conductive type, and a conductive type of the second well is opposite to the conductive type of the first and second doped regions.
7. The semiconductor device of claim 6 , wherein the first well comprises a plurality of stripe-shaped sub-wells.
8. The semiconductor device of claim 7 , wherein the gate structure is in a strip shape, and the gate structure and each stripe-shaped sub-well extend along a same direction.