IP Library Granted Patent US 10,790,756
Granted Patent B2
US 10,790,756 · App. 15/968,216 · Granted Sep 29, 2020

Variable blanking frequency for resonant converters

Inventors: Bonggeun Chung (Siheung-si, KR); Taesung Kim (Yangcheon-gu, KR); Gwanbon Koo (Sunnyvale, CA)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H02M3/3376H02M3/155H02M3/24H02M3/335H02M3/33507H02M3/33523H03J1/0091H04B1/715H02M2001/0025H02M2001/0058Y02B70/1433Y02B70/1491Y02P80/112
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Quick Facts
Patent No.
US 10,790,756
App. No.
15/968,216
Granted
Sep 29, 2020
Kind
B2
Abstract

A power supply includes a transistor that is connected to a primary winding of a transformer. A controller controls a switching operation of the transistor by quasi-resonant switching. The controller receives a feedback voltage and adjusts the feedback voltage to adjust a blanking frequency, which is an inverse of a blanking time during which the transistor is prevented from being turned on. The controller turns on the transistor after expiration of the blanking time based on a level of a resonant ring.

Claims (50)

1. A circuit for controlling a power supply, the circuit comprising:

a driver circuit configured to output a gate drive signal; and

a blanking frequency generator circuit configured to generate a blanking signal based on a level of an input line voltage of the power supply and a feedback signal, the feedback signal having a value corresponding to an output voltage of the power supply, and the blanking signal being asserted in response to a rising edge of the gate drive signal to indicate a blanking interval;

wherein the blanking signal operates to prevent the gate drive signal from being turned on when the blanking signal is asserted.

2. The circuit of claim 1 , further comprising:

an input line voltage detect circuit configured to detect whether the input line voltage has a low line voltage condition or a high line voltage condition; and

the blanking frequency generator circuit configured to generate the blanking signal according to whether the input line voltage has the low line voltage condition or the high line voltage condition and according to the feedback signal,

wherein for each of a plurality of values of the feedback signal, the frequency of the assertion of the blanking signal is higher when the input line voltage has the low line voltage condition than when the input line voltage has the high line voltage condition.

3. The circuit of claim 1 , further comprising:

the blanking frequency generator circuit configured to limit the value of the feedback signal to be less than or equal to a predetermined maximum feedback value.

4. The circuit of claim 1 , further comprising:

the blanking frequency generator circuit configured to limit the value of the feedback signal to be greater than or equal to a predetermined minimum feedback value.

5. The circuit of claim 1 , further comprising:

the blanking frequency generator circuit configured to limit a frequency of the assertion of the blanking signal to less than or equal to a predetermined maximum blanking frequency.

6. The circuit of claim 1 , further comprising:

the blanking frequency generator circuit configured to limit a frequency of the assertion of the blanking signal to greater than or equal to a predetermined minimum blanking frequency.

7. The circuit of claim 1 , further comprising:

a valley detect circuit configured to detect a valley, the valley corresponding to a low level of a resonant ring voltage; and

the driver circuit configured to turn on the gate drive signal in response to the detection of the valley when the blanking signal is not asserted.

8. The circuit of claim 1 , further comprising:

the blanking frequency generator circuit configured to generate the blanking signal according to a predetermined shift frequency value.

9. A circuit for controlling a power supply, the circuit comprising:

a valley detect circuit configured to generate a valley detect signal indicating a valley, the valley corresponding to a low level of a resonant ring voltage;

a blanking frequency generator circuit configured to generate a blinking signal according to an input line voltage of the power supply and a feedback signal, the feedback signal having a value corresponding to an output voltage of the power supply;

an oscillator circuit to generate a clock signal according to the valley detect signal and a blanking signal; and

a Pulse Width Modulation (PWM) circuit to generate a gate drive signal according to the clock signal and a current sense signal,

wherein the blanking signal is asserted in response to a rising edge of the gate drive signal.

10. The circuit of claim 9 , further comprising:

an input line voltage detect circuit configured to detect whether the input line voltage has a low line voltage condition or a high line voltage condition,

wherein the blanking frequency generator circuit is configured to generate the blanking signal according to whether the input line voltage has the low line voltage condition or the high line voltage condition, and

wherein for each of a plurality of values of the feedback signal, the frequency of the assertion of the blanking signal is higher when the input line voltage has the low line voltage condition than when the input line voltage has the high line voltage condition.

11. The circuit of claim 10 , further comprising the blanking frequency generator circuit configured to receive an offset signal indicating a frequency offset value and to determine a minimum frequency of the blanking signal according to a frequency offset value.

12. The circuit of claim 10 , further comprising the blanking frequency generator circuit configured to limit the value of the feedback signal used to determine the frequency of the blanking signal to be less than or equal to a predetermined maximum feedback value.

13. A method for controlling a power supply, the method comprising:

generating, by a blanking frequency generator circuit, a blanking signal based on a level of an input line voltage of the power supply and a feedback signal, the feedback signal having a value corresponding to an output voltage of the power supply, and the blanking signal being asserted in response to a rising edge of a gate drive signal to indicate a blanking interval; and

preventing the gate drive signal from being turned on when the blanking signal is asserted.

14. The method of claim 13 , further comprising:

detecting, using a line voltage detect circuit, whether the input line voltage has a low line voltage condition or a high line voltage condition; and

generating the blanking signal according to whether the input line voltage has the low line voltage condition or the high line voltage condition and according to the feedback signal,

wherein for each of a plurality of values of the feedback signal, the frequency of the assertion of the blanking signal is higher when the input line voltage has the low line voltage condition than when the input line voltage has the high line voltage condition.

15. The method of claim 13 , further comprising:

limiting the value of the feedback signal used to generating the blanking signal to be less than or equal to a predetermined maximum feedback value.

16. The method of claim 13 , further comprising:

limiting the value of the feedback signal used to generating the blanking signal to be greater than or equal to a predetermined minimum feedback value.

17. The method of claim 13 , wherein generating the blanking signal comprises limiting a frequency of the assertion of the blanking signal to less than or equal to a predetermined maximum blanking frequency.

18. The method of claim 13 , wherein generating the blanking signal comprises limiting a frequency of the assertion of the blanking signal to greater than or equal to a predetermined minimum blanking frequency.

19. The method of claim 13 , further comprising:

detecting, using a valley detect circuit, a valley corresponding to a low level of a resonant ring voltage; and

turning on the gate drive signal in response to the detection of the valley when the blanking signal is not asserted.

20. The method of claim 13 , wherein generating the blanking signal comprises the blanking frequency generator circuit configured to generate the blanking signal according to a predetermined shift frequency value.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 047864, FRAME 0611 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064077/0298 →
PATENT SECURITY AGREEMENT Recorded Oct 16, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047864/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2018
From: CHUNG, BONGGEUN; KOO, GWANBON; KIM, TAESUNG
To: FAIRCHILD KOREA SEMICONDUCTOR LTD.
Reel/Frame 045684/0593 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2018
From: FAIRCHILD KOREA SEMICONDUCTOR LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 046047/0308 →