IP Library Granted Patent US 10,466,519
Granted Patent B2
US 10,466,519 · App. 15/969,223 · Granted Nov 5, 2019

Liquid crystal display device

Inventors: Kazuhiko Yanagawa (Mobara, JP); Yasushi Iwakabe (Ooamishirasato, JP); Yoshiaki Nakayoshi (Ooamishirasato, JP); Masatoshi Wakagi (Hitachi, JP)
Assignees: Japan Dlsplay Inc.; Panasonic Liquid Crystal Display Co., Ltd.
G02F1/13306G02F1/1333G02F1/1341G02F1/1368G02F1/13394G02F1/13452G02F1/133305G02F1/133345G02F1/133512G02F1/136286G02F1/1339G02F1/1345G02F1/134363G02F2001/13398G02F2001/13629G02F2001/133334G02F2001/133354G02F2001/136295G02F2201/503G02F2202/02
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Quick Facts
Patent No.
US 10,466,519
App. No.
15/969,223
Granted
Nov 5, 2019
Kind
B2
Abstract

There is provided a liquid crystal display (LCD) device that prevents light leaks near spacers. The LCD device controls the optical transmissivity of a liquid crystal layer interposed between substrates disposed opposite each other, by means of an electric field generated in the layer-thickness direction of the liquid crystal layer. The LCD device includes spacers on a liquid-crystal-side surface of one substrate, signal lines formed on a liquid-crystal-side surface of the other substrate, an insulating film formed to cover the signal lines, and electrodes on the insulating film's upper surface. Each electrode contributes to controlling the optical transmissivity of the liquid crystal layer. Each spacer has a vertex surface disposed opposite to the signal lines. A portion of each electrode extends to the upper surface of a corresponding signal line. The extended portion is opposite to a part of a spacer's vertex surface disposed opposite to the corresponding signal line.

Claims (43)

1. A liquid crystal display device comprising:

a first substrate and a second substrate;

a seal material between the first substrate and the second substrate;

a liquid crystal layer between the first substrate and the second substrate;

a liquid crystal molecule in the liquid crystal layer;

a gate signal line formed on an inner surface of the second substrate;

a pixel electrode;

a reference electrode which causes an electric field controlling the liquid crystal molecule to form between the reference electrode and the pixel electrode;

an organic material layer disposed between the gate signal line and the reference electrode; and

a layer disposed between the pixel electrode and the reference electrode, wherein

the pixel electrode is made of transparent conductive material,

the reference electrode is made of transparent conductive material,

the gate signal line has edges facing each other,

the reference electrode is formed on the gate signal line and covers the edges in plane view,

a non-formation region of the organic material layer is outside a display area in plane view, and extends in a direction in which the sealing material extends and

a formation region of the organic material layer, the non-formation region and the display area are arranged in this order from an edge of the second substrate towards inside of the second substrate in plane view.

2. The liquid crystal display device according to claim 1 , wherein

the non-formation region is outside the display area and inside the seal material in plane view.

3. The liquid crystal display device according to claim 1 , further comprising:

a drain signal line crossing the gate signal line, wherein the drain signal line overlaps the reference electrode.

4. The liquid crystal display device according to claim 1 , further comprising:

a spacer formed on an inner surface of the first substrate;

a black matrix formed on the inner surface side of one of the first and second substrates facing the liquid crystal layer, wherein the black matrix overlaps the spacer.

5. The liquid crystal display device according to claim 1 , wherein the gate signal line overlaps the reference electrode.

6. The liquid crystal display device according to claim 3 , further comprising:

a spacer formed on an inner surface of the first substrate, wherein the drain signal line overlaps the spacer.

7. The liquid crystal display device according to claim 3 , wherein a width of the reference electrode is wider than a width of the drain signal line.

8. The liquid crystal display device according to claim 1 , further comprising:

a plurality of pixel electrodes adjacent each other, wherein the reference electrode is common between the plurality of pixel electrodes.

9. The liquid crystal display device according to claim 1 , wherein all of a vertex surface of the spacer is covered with the reference electrode in plane view.

10. The liquid crystal display device according to claim 1 , wherein a width of the reference electrode is wider than a width of the gate signal line, and the width of the gate signal line is wider than a width of the spacer.

11. The liquid crystal display device according to claim 1 , wherein the liquid crystal display device is configured according to the following expression (1), wherein a thickness of the liquid crystal display layer is d 3 , a width of the reference electrode which the reference electrode doesn't overlap the gate signal line is d 2 , and a thickness of insulating layers between the gate signal line and the reference electrode is d 1 as follows:

d 2 >d 1 ×{square root over (d 3 )}  (1)

12. The liquid crystal display device according to claim 1 , wherein the seal material contacts the organic material layer outside the non-formation region.

13. The liquid crystal display device according to claim 1 further comprising:

an interconnection line outside the display area, wherein

the forming region overlaps the interconnection line in plane view.

14. The liquid crystal display device according to claim 1 , wherein

the interconnection line is a power source line, an inspection line or a signal line.

15. The liquid crystal display device according to claim 1 further comprising:

a spacer formed on an inner surface of the first substrate, wherein the spacer overlaps the gate signal line in plane view.

16. The liquid crystal display device according to claim 1 further comprising:

a driver circuit attached on the non-formation region.

Assignments (10)
COMPANY SPLIT AND ASSIGNMENT Recorded Oct 21, 2019
From: HITACHI DISPLAYS, LTD.
To: HITACHI DISPLAYS, LTD.; IPS ALPHA SUPPORT CO., LTD.
Reel/Frame 050775/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2019
From: HITACHI, LTD.
To: HITACHI DISPLAYS, LTD.
Reel/Frame 051347/0631 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2019
From: YANAGAWA, KAZUHIKO; IWAKABE, YASUSHI; NAKAYOSHI, YOSHIAKI; WAKAGI, MASATOSHI
To: HITACHI, LTD.
Reel/Frame 050774/0727 →
MERGER Recorded Oct 21, 2019
From: IPS ALPHA SUPPORT CO., LTD.
To: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
Reel/Frame 050774/0929 →
CHANGE OF NAME Recorded Jan 15, 2019
From: HITACHI DISPLAYS, LTD.
To: JAPAN DISPLAY EAST INC.
Reel/Frame 048074/0415 →
CHANGE OF NAME Recorded Jan 15, 2019
From: JAPAN DISPLAY EAST INC.
To: JAPAN DISPLAY INC.
Reel/Frame 049632/0295 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2019
From: IPS ALPHA SUPPORT CO., LTD.
To: PANASONIC LIQUID CRYSTL DISPLAY CO., LTD.
Reel/Frame 048007/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2019
From: HITACHI, LTD.
To: HITACHI DISPLAYS, LTD.
Reel/Frame 049632/0181 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2018
From: YANAGAWA, KAZUHIKO; IWAKABE, YASUSHI; NAKAYOSHI, YOSHIAKI; WAKAGI, MASATOSHI
To: HITACHI, LTD.
Reel/Frame 047835/0258 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2018
From: HITACHI, LTD.
To: HITACHI DISPLAYS, LTD.
Reel/Frame 048004/0338 →
Priority Claims (1)
JP 2000-384173 · Dec 18, 2000 · national
Continuity (9)
Continuation 15617880 · Jun 8, 2017
Continuation 14512004 · Oct 10, 2014
Division 13373291 · Nov 10, 2011
Division 12662708 · Apr 29, 2010
Continuation 12081347 · Apr 15, 2008
Continuation 11437712 · May 22, 2006
Division 10694056 · Oct 28, 2003
Division 09948758 · Sep 10, 2001
Related Publication 20180252953A1 · Sep 6, 2018