IP Library Granted Patent US 10,886,325
Granted Patent B2
US 10,886,325 · App. 15/971,217 · Granted Jan 5, 2021

Infrared detector devices and focal plane arrays having a transparent common ground structure and methods of fabricating the same

Inventors: Yajun Wei (San Jose, CA); Steven Allen (Mason, OH); Michael Garter (Lebanon, OH); Mark Greiner (Loveland, OH); David Forrai (Centerville, OH); Darrel Endres (West Chester, OH); Robert Jones (Cincinnati, OH)
Assignee: L3 CINCINNATI ELECTRONICS CORPORATION
H01L27/14694H01L27/1443H01L27/14632H01L27/14649H01L27/14669H01L27/14678H01L31/03046H01L31/035236
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Quick Facts
Patent No.
US 10,886,325
App. No.
15/971,217
Granted
Jan 5, 2021
Kind
B2
Abstract

Focal plane arrays and infrared detector device having a transparent common ground structure and methods of their fabrication are disclosed. In one embodiment, a front-side illuminated infrared detector device includes a contact layer and a detector structure adjacent to the contact layer. The detector structure is capable of absorbing radiation. The front-side illuminated infrared detector device further includes a common ground structure adjacent the detector structure, wherein the common ground structure is transmissive to radiation having a wavelength in a predetermined spectral band, and the common ground structure has a bandgap that is wider than a bandgap of the detector structure. The front-side illuminated infrared detector device further includes an optical layer adjacent the common ground structure.

Claims (47)

1. A method of fabricating a frontside-illuminated focal plane array, the method comprising:

providing a wafer comprising a bulk substrate layer, a contact layer disposed on the bulk substrate layer, a detector structure disposed on the contact layer, and a common ground structure disposed on the detector structure, wherein the common ground structure is transmissive to radiation having a desired wavelength, and the common ground structure has a bandgap that is wider than a bandgap of the detector structure;

bonding an optical layer to the common ground structure;

thinning the bulk substrate layer of the wafer;

etching the contact layer and the detector structure to form an array of infrared photodetector devices, each individual infrared photodetector device defining a pixel having a wall, wherein the detector structure is fully reticulated and the common ground structure is partially reticulated; and

forming at least one ground pixel by depositing an electrically conductive layer on the wall of the pixel in at least one infrared photodetector device of the array of infrared photodetector devices to electrically couple a contact layer of the at least one ground pixel to the common ground structure.

2. The method of claim 1 , wherein the wafer further comprises an optical coating disposed on the common ground structure.

3. The method of claim 1 , wherein:

the optical layer comprises a first surface and a second surface;

a first optical coating disposed on the first surface of the optical layer; and

a second optical coating disposed on the second surface of the optical layer.

4. The method of claim 1 , wherein the wafer further comprises an optical coating disposed on the common ground structure.

5. The method of claim 1 , wherein:

the array of infrared photodetector device comprises an array of contact layers; and

the method further comprises bump bonding the array of contact layers of the array of infrared photodetector devices to a read-out integrated circuit assembly.

6. The method of claim 1 , wherein the optical layer is bonded to the common ground structure by an adhesive transmissive to the radiation of the desired wavelength.

7. The method of claim 1 , wherein the bulk substrate layer is first mechanically thinned and subsequently chemically thinned.

8. The method of claim 1 , wherein the wafer comprises a uni-polar barrier layer disposed between the detector structure and the common ground structure, and the etching fully reticulates the uni-polar barrier layer.

9. The method of claim 1 , wherein the common ground structure comprises an etch buffer layer and a primary conduction layer.

10. The method of claim 9 , wherein the etch buffer layer is an etch stop during the etching step.

11. The method of claim 1 , wherein the common ground structure comprises:

a common ground plane layer;

a carrier collector layer adjacent the common ground plane layer; and

uni-polar barrier layer disposed between the carrier collector layer and the detector structure.

12. The method of claim 11 , wherein the etching is such that:

the uni-polar barrier layer is fully reticulated;

the carrier collector layer is at least partially reticulated; and

the common ground plane layer is not reticulated.

13. The method of claim 11 , wherein the etching is such that:

the uni-polar barrier layer is fully reticulated;

the carrier collector layer is fully reticulated; and

the common ground plane layer is partially reticulated.

14. The method of claim 11 , wherein the carrier collector layer has a bandgap that is narrower than the bandgap of the detector structure.

15. The method of claim 11 , wherein the carrier collector layer has alternating layers of a wider bandgap material and a narrower bandgap material such that a bandgap of the carrier collector layer has a corrugated shape.

16. The method of claim 1 , wherein:

the common ground structure comprises a common ground plane layer and a pass-through conduction layer disposed between the detector structure and the common ground plane layer;

the etching is such that the pass-through conduction layer is fully reticulated; and

the common ground plane layer comprises aluminum.

17. The method of claim 16 , wherein the wafer further comprises an oxidation prevention layer disposed on the common ground structure.

18. The method of claim 16 , wherein the wafer further comprises a uni-polar barrier layer disposed between the pass-through conduction layer and the detector structure.

19. The method of claim 16 , wherein the detector structure comprises a first absorber layer having a first bandgap and a second absorber layer having a second bandgap.

20. The method of claim 16 , wherein the wafer comprises a uni-polar barrier layer disposed between the first absorber layer and the second absorber layer.

21. The method of claim 1 , wherein the detector structure comprises:

a first absorber layer having a first bandgap;

a second absorber layer having a second bandgap; and

a uni-polar layer disposed between the first absorber layer and the second absorber layer.

22. The method of claim 21 , wherein the common ground structure comprises a common ground plane layer comprising aluminum.

Assignments (2)
CHANGE OF NAME Recorded Dec 22, 2022
From: L3 CINCINNATI ELECTRONICS CORPORATION
To: L3HARRIS CINCINNATI ELECTRONICS CORPORATION
Reel/Frame 062206/0635 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2019
From: WEI, YAJUN; ALLEN, STEVEN; GARTER, MICHAEL; GREINER, MARK; FORRAI, DAVID; ENDRES, DARREL; JONES, ROBERT
To: L3 CINCINNATI ELECTRONICS CORPORATION
Reel/Frame 048014/0401 →
Continuity (4)
Continuation PCTUS2017043734 · Jul 25, 2017
Provisional Application 62513715 · Jun 1, 2017
Provisional Application 62366390 · Jul 25, 2016
Related Publication 20180294301A1 · Oct 11, 2018