IP Library Granted Patent US 10,446,609
Granted Patent B2
US 10,446,609 · App. 15/984,223 · Granted Oct 15, 2019

Correlated electron switch structures and applications

Inventors: Lucian Shifren (San Jose, CA); Kimberly Gay Reid (Austin, TX); Gregory Munson Yeric (Austin, TX)
Assignee: ARM Ltd.
H01L27/2436H01L45/04H01L45/1226H01L45/1233H01L45/146
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Quick Facts
Patent No.
US 10,446,609
App. No.
15/984,223
Granted
Oct 15, 2019
Kind
B2
Abstract

Subject matter disclosed herein may relate to devices formed from correlated electron material.

Claims (28)

1. A method comprising:

etching at least a portion of a substrate to form a first cavity exposing at least a portion of a first metal layer; and

forming one or more layers of correlated electron material (CEM) over the cavity to form a CEM structure at least partially filling the cavity,

wherein at least one of the one or more layers of CEM forms a switching region that is switchable between impedance states based, at least in part, on a concentration of electrons in the switching region, and wherein the switching region comprises a continuous switching region and at least two of the one or more layers form at least two conductive regions.

2. The method of claim 1 , and further comprising depositing one or more layers of an electrode material over the cavity prior to the forming of the one or more layers of the CEM over the cavity.

3. The method of claim 2 , wherein the electrode material comprises titanium nitride, platinum, titanium, copper, aluminum, cobalt, nickel, tungsten, tungsten nitride, cobalt silicide, ruthenium oxide, chromium, gold, palladium, indium tin oxide, tantalum, silver or iridium, or any combination thereof.

4. The method of claim 1 , wherein the one or more layers of CEM forms two or more discontinuous switching regions and at least two of the one or more layers forms at least two conductive regions.

5. The method of claim 4 , wherein the two or more discontinuous switching regions comprise intrinsic CEM and the two or more conductive regions comprise p-type doped CEM.

6. The method of claim 4 , wherein the two or more discontinuous switching regions comprise p-type doped CEM and the two or more conductive regions comprise intrinsic CEM.

7. The method of claim 1 , and further comprising forming a second metal layer over the CEM structure.

8. The method of claim 1 , wherein forming the one or more layers of the CEM over the cavity to form a CEM structure at least partially filling the cavity further comprises depositing the one or more layers of CEM over the cavity.

9. A method comprising:

etching at least a portion of a substrate to form a first cavity exposing at least a portion of a first metal layer;

forming one or more layers of correlated electron material (CEM) over the cavity to form a CEM structure at least partially filling the cavity;

etching a second cavity in the CEM structure; and

forming a metal structure in the second cavity at least partially filling the second cavity, wherein at least one of the one or more layers of CEM forms a switching region that is switchable between impedance states based, at least in part, on a concentration of electrons in the switching region.

10. A device comprising:

a first metal layer;

a substrate disposed on the first metal layer comprising a first cavity exposing at least a portion of the first metal layer; and

a correlated electron material (CEM) structure disposed in the cavity, the CEM structure at least partially filling the cavity, comprising one or more layers of CEM disposed on at least the exposed portion of the first metal layer, wherein at least one of the one or more layers of CEM comprises a switching region that is switchable between impedance states based, at least in part, on a concentration of electrons in the switching region, and wherein the switching region comprises a continuous switching region and at least two of the one or more layers form at least two conductive regions.

11. The device of claim 10 , and further comprising a second metal layer formed on the CEM structure.

12. The device of claim 10 , and further comprising a metal structure disposed in a second cavity disposed in the CEM structure.

13. The device of claim 10 , and further comprising one or more layers of an electrode material disposed between at least a portion of the one or more layers of CEM and the first metal layer.

14. The device of claim 13 , wherein the electrode material comprises titanium nitride, platinum, titanium, copper, aluminum, cobalt, nickel, tungsten, tungsten nitride, cobalt silicide, ruthenium oxide, chromium, gold, palladium, indium tin oxide, tantalum, silver or iridium, or any combination thereof.

15. The device of claim 10 , wherein the switching region comprises a continuous switching region and at least two of the one or more layers comprise at least two conductive regions.

16. The device of claim 10 , wherein the one or more layers of CEM comprise two or more discontinuous switching regions, and at least two of the one or more layers comprise at least two conductive regions.

17. The device of claim 16 , wherein the two or more discontinuous switching regions comprise intrinsic CEM and the two or more conductive regions comprise p-type doped CEM.

18. The device of claim 16 , wherein the two or more discontinuous switching regions comprise p-type doped CEM and the two or more conductive regions comprise intrinsic CEM.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2020
From: ARM LIMITED
To: CERFE LABS, INC.
Reel/Frame 054297/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2018
From: SHIFREN, LUCIAN; REID, KIMBERLY GAY; YERIC, GREGORY MUNSON
To: ARM LTD.
Reel/Frame 046201/0864 →
Continuity (2)
Continuation 15270974 · Sep 20, 2016
Related Publication 20180269395A1 · Sep 20, 2018