IP Library Patent Application 15987075
Patent Application
App. No. 15/987,075

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

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Patent No.
US None
App. No.
15/987,075
Abstract

Provided are a semiconductor device and a method of manufacturing the same. The method may, for example, comprise forming an interposer on a dummy substrate; forming a conductive pillar on the interposer; contacting the top of the interposer with at least one semiconductor die; encapsulating the conductive pillar and the at least one semiconductor die with an encapsulant; forming a redistribution layer that is electrically connected to the conductive pillar, on the semiconductor die; removing the dummy substrate from the interposer; attaching the interposer, which has the at least one semiconductor die in contact, to a substrate and testing the at least one semiconductor die; and contacting a stacked semiconductor device with the redistribution layer.

Claims (68)

1 - 20 . (canceled)

21 . A method of manufacturing a semiconductor device, the method comprising:

providing a dummy substrate comprising a first surface and a second surface opposite the first surface;

building a first multilayer structure upon the first surface of the dummy substrate, by:

providing a first circuit pattern upon the first surface of the dummy substrate,

applying a dielectric material to at least a portion of the first surface of the dummy substrate and at least a portion of the first circuit pattern, and

providing a second circuit pattern that electrically contacts portions of the first circuit pattern exposed by the dielectric material;

providing a conductive pillar having a first end contacting a first portion of the second circuit pattern exposed by the dielectric material;

attaching a conductive terminal on a first surface of a semiconductor die to a second portion of the second circuit pattern exposed by the dielectric material;

encapsulating the conductive pillar, the semiconductor die, and a top surface of the first multilayer structure, with an encapsulant;

building a second multilayer structure over the encapsulated conductive pillar and the encapsulated semiconductor die and electrically interconnecting the second multilayer structure to a second end of the conductive pillar opposite the first end of the conductive pillar;

removing at least a portion of the dummy substrate to expose the first circuit pattern of the first multilayer structure; and

attaching a conductive element of a stacked semiconductor device to an exposed circuit pattern of the second multilayer structure.

22 . The method according to claim 21 , further comprising:

positioning the semiconductor die over the first multilayer structure at a location between the conductive pillar and a second conductive pillar.

23 . The method according to claim 21 , wherein, after encapsulating, at least a portion of the second end of the conductive pillar and at least a portion of a second surface of the semiconductor die opposite the first surface of the semiconductor die are exposed from the encapsulant.

24 . The method according to claim 21 , wherein said second end of said conductive pillar is at generally a same height above the top surface of the first multilayer structure as the second surface of the semiconductor die.

25 . The method according to claim 21 , wherein the dummy substrate is a silicon material or a glass material.

26 . The method according to claim 21 , wherein the first surface of the semiconductor die is attached to the second portion of the second circuit pattern by melting a conductive bump.

27 . The method according to claim 21 , further comprising:

filling a space between the first surface of the semiconductor die and the top surface of the first multilayer structure with an underfill material, before the encapsulating.

28 . The method according to claim 21 , wherein removing material from the second surface of the dummy substrate comprises one or both of grinding and etching the dummy substrate.

29 . The method according to claim 21 , further comprising:

attaching a conductive bump to an exposed portion of the first circuit pattern of the first multilayer structure.

30 . A method of manufacturing a semiconductor device, the method comprising:

providing a dummy substrate comprising a first surface and a second surface opposite the first surface;

building on the first surface of the dummy substrate, a first multilayer structure comprising:

a first circuit pattern,

a second circuit pattern electrically connected to the first circuit pattern, and

a dielectric structure

exposing a portion of the first circuit pattern at a first surface of the first multilayer structure and

exposing a portion of the second circuit pattern at a second surface of the first multilayer structure opposite the first surface of the first multilayer structure;

providing a conductive pillar in contact with a first portion of the second circuit pattern exposed by the dielectric material;

attaching a conductive terminal on a first surface of a semiconductor die to a second portion of the second circuit pattern of the first multilayer structure exposed by the dielectric material;

encapsulating the conductive pillar, the semiconductor die, and the second surface of the first multilayer structure, with an encapsulant;

building a second multilayer structure over an exposed second end of the conductive pillar opposite the first end of the conductive pillar, an exposed second surface of the semiconductor die opposite the first surface of the semiconductor die, and a top surface of the encapsulant, to electrically interconnect the second multilayer structure to the second circuit pattern of the first multilayer structure;

removing at least a portion of the dummy substrate to expose the first circuit pattern of the first multilayer structure; and

attaching a conductive element of a stacked semiconductor device to an exposed circuit pattern of the second multilayer structure.

31 . The method according to claim 30 , wherein the second multilayer structure comprises:

a circuit pattern, and

at least one dielectric material layer that exposes the circuit pattern of the second multilayer structure to electrically contact the stacked semiconductor device.

32 . The method according to claim 30 , wherein the dummy substrate is a silicon material or a glass material.

33 . The method according to claim 30 , further comprising:

filling a space between the first surface of the semiconductor die and the second surface of the first multilayer structure with an underfill material, before the encapsulating.

34 . The method according to claim 30 , wherein the first surface of the semiconductor die and the second surface of the semiconductor die are connected by side surfaces, and wherein the encapsulant covers the side surfaces and exposes the second surface of the semiconductor die.

35 . The method according to claim 30 , wherein attaching the conductive terminal on the first surface of the semiconductor die to the second portion of the second circuit pattern exposed by the dielectric material of the first multilayer structure comprises melting a conductive member between the conductive terminal and the second portion of the second circuit pattern of the first multilayer structure.

36 . A method of manufacturing a semiconductor device, the method comprising:

providing a dummy substrate comprising a first surface;

building a first multilayer structure directly on the first surface of the dummy substrate, the building comprising:

providing a first circuit pattern directly on the first surface of the dummy substrate,

applying a dielectric material that surrounds the first circuit pattern, and

providing a second circuit pattern electrically connected to the first circuit pattern;

positioning a first end of a conductive pillar on a first portion of the second circuit pattern exposed by the dielectric material;

providing a conductive terminal on a bond pad of a semiconductor die to electrically connect a second portion of the second circuit pattern exposed by the dielectric material to the bond pad of the semiconductor die;

encapsulating the conductive pillar, the semiconductor die, and the second surface of the first multilayer structure, with an encapsulant;

providing a second multilayer structure over

an exposed second end of the conductive pillar opposite the first end of the conductive pillar,

an exposed second surface of the semiconductor die opposite the first surface of the semiconductor die, and

a top surface of the encapsulant,

to electrically interconnect the second multilayer structure to the second circuit pattern of the first multilayer structure via the conductive pillar;

removing at least a portion of the dummy substrate to expose the first circuit pattern of the first multilayer structure; and

attaching a conductive element of a stacked semiconductor device to an exposed circuit pattern of the second multilayer structure.

37 . The method according to claim 36 , wherein the dummy substrate is a silicon material or a glass material.

38 . The method according to claim 36 , further comprising:

filling a space between the first surface of the semiconductor die and a top surface of the first multilayer structure with an underfill material, before the encapsulating.

39 . The method according to claim 36 , wherein removing material from the second surface of the dummy substrate comprises one or both of grinding and etching the dummy substrate.

40 . The method according to claim 36 , further comprising:

attaching a conductive bump to the first circuit pattern of the first multilayer structure exposed by removing at least a portion of the dummy substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054644/0621 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →