Transmit/receive switching circuit
A transmit/receive switching circuit implementation reduces transmitting/receiving switching losses in a transceiver during different modes of operation. The implementation includes connecting a low noise amplifier and a power amplifier in accordance with a shunt configuration in the transceiver. The implementation also includes disabling the power amplifier to achieve a high impedance state by grounding an output stage bias and enabling the low noise amplifier and disabling one or more transistors connected to a path between the low noise amplifier and the power amplifier during a receive mode.
1. A transmit/receive switching circuit, comprising:
an antenna node;
a power amplifier coupled to the antenna node;
a first switch coupled to the antenna node;
a low noise amplifier coupled to the first switch, the first switch in shunt with the low noise amplifier;
an inductor having a first node coupled to the antenna node and a second node coupled to the first switch;
a second switch coupled to the antenna node via the second node of the inductor; and
a transformer coupling the power amplifier to the antenna node.
2. The transmit/receive switching circuit of claim 1 , further comprising a controller configured:
to cause the power amplifier and the low noise amplifier to be disabled;
to cause the first switch to be enabled; and
to cause the second switch to be disabled during an off mode where the power amplifier and the low noise amplifier are disabled.
3. The transmit/receive switching circuit of claim 1 , further comprising a capacitor between the first switch and the low noise amplifier.
4. The transmit/receive switching circuit of claim 3 , in which the capacitor comprises a direct current (DC) blocking/matching capacitor.
5. The transmit/receive switching circuit of claim 1 , further comprising a controller configured:
to cause the low noise amplifier and the power amplifier to be connected in accordance with a shunt configuration in a transceiver; and
to cause the power amplifier to be disabled to achieve a high impedance state by grounding a node coupled to a bias circuit that generates an output stage bias and enabling the low noise amplifier and disabling the first switch and the second switch connected in parallel to a path between the low noise amplifier and the power amplifier during a receive mode.
6. The transmit/receive switching circuit of claim 1 , further comprising a controller configured:
to cause a shunt switch comprising the first switch and the second switch to be turned ON to present an attenuation impedance and act as an attenuator and to cause an attenuated signal to be provided to a receive path of the transmit/receive switching circuit;
to cause the attenuated signal to reach the low noise amplifier; and
to keep the low noise amplifier ON in an extra low gain mode.
7. The transmit/receive switching circuit of claim 1 , further comprising a controller configured:
to cause the low noise amplifier to be disabled and the power amplifier to be enabled; and
to cause the first switch and the second switch to be turned ON during a transmit mode.
8. The transmit/receive switching circuit of claim 1 , further comprising an antenna element coupled to the antenna node, the antenna element being part of an antenna array.
9. The transmit/receive switching circuit of claim 1 , wherein the power amplifier is configured to amplify millimeter-wave signals and the low noise amplifier is configured to amplify millimeter-wave signals.
10. A transmit/receive switching circuit, comprising:
an antenna node;
means for amplifying a signal to the antenna node, the amplifying means coupled to the antenna node;
a first switch coupled to the antenna node;
a low noise amplifier coupled to the first switch, the first switch in shunt with the low noise amplifier;
an inductor having a first node coupled to the antenna node and a second node coupled to the first switch;
a second switch coupled to the antenna node via the second node of the inductor; and
a transformer coupling the amplifying means to the antenna node.
11. The transmit/receive switching circuit of claim 10 , further comprising a second switch coupled to the antenna node, in which the inductor couples the antenna node to the second switch.
12. The transmit/receive switching circuit of claim 10 , further comprising a controller configured:
to cause the amplifying means and the low noise amplifier to be disabled;
to cause the first switch to be enabled; and
to cause a second switch to be disabled during an off mode where the amplifying means and the low noise amplifier are disabled.
13. The transmit/receive switching circuit of claim 10 , further comprising a capacitor between the first switch and the low noise amplifier.
14. The transmit/receive switching circuit of claim 13 , in which the capacitor comprises a direct current (DC) blocking/matching capacitor.
15. The transmit/receive switching circuit of claim 10 , further comprising a controller configured:
to cause the low noise amplifier and the amplifying means to be connected in accordance with a shunt configuration in a transceiver; and
to cause the amplifying means to be disabled to achieve a high impedance state by grounding a node coupled to a bias circuit that generates an output stage bias and enabling the low noise amplifier and disabling the first switch and the second switch connected in parallel to a path between the low noise amplifier and the amplifying means during a receive mode.
16. The transmit/receive switching circuit of claim 10 , further comprising a controller configured:
to cause a shunt switch comprising the first switch and the second switch to be turned ON to present an attenuation impedance and act as an attenuator and to cause an attenuated signal to be provided to a receive path of the transmit/receive switching circuit;
to cause the attenuated signal to reach the low noise amplifier; and
to keep the low noise amplifier ON in an extra low gain mode.