IP Library Granted Patent US 10,833,163
Granted Patent B2
US 10,833,163 · App. 16/000,057 · Granted Nov 10, 2020

Epitaxial structure of N-face group III nitride, active device, and method for fabricating the same with integration and polarity inversion

Inventor: Chih-Shu Huang (Taipei, TW)
H01L29/475C30B25/183C30B29/406C30B31/22H01L21/8252H01L23/5389H01L27/0605H01L27/0629H01L27/085H01L27/0883H01L29/207H01L29/66462H01L29/778H01L29/7783H01L29/872H01L29/045H01L29/2003H01L29/402H01L29/41766
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Quick Facts
Patent No.
US 10,833,163
App. No.
16/000,057
Granted
Nov 10, 2020
Kind
B2
Abstract

The present invention provides an epitaxial structure of N-face group III nitride, its active device, and the method for fabricating the same. By using a fluorine-ion structure in device design, a 2DEG in the epitaxial structure of N-face group III nitride below the fluorine-ion structure will be depleted. Then the 2DEG is located at a junction between a i-GaN channel layer and a i-Al y GaN layer, and thus fabricating GaN enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs), hybrid Schottky barrier diodes (SBDs), or hybrid devices. After the fabrication step for polarity inversion, namely, generating stress in a passivation dielectric layer, the 2DEG will be raised from the junction between the i-GaN channel layer and the i-Al y GaN layer to the junction between the i-GaN channel layer and the i-Al x GaN layer.

Claims (16)

1. A method for fabricating an enhancement-mode N-face AlGaN/GaN high electron mobility transistor with polarity inversion comprising steps of:

forming a substrate;

forming a buffer layer (C-doped) layer on the substrate;

forming a carbon doped (C-doped) i-GaN layer on the buffer layer (C-doped);

forming an i-AlyGaN layer on said C-doped i-GaN layer;

forming an i-GaN channel layer on said i-AlyGaN layer;

forming an i-AlxGaN layer on said i-GaN channel layer, wherein an epitaxial layer is formed from said substrate to said i-AlxGaN layer;

implanting fluorine ions into said i-AlxGaN layer (x=0.1˜0.3) using a fluorine-ion plasma under a specific electric field (or a specific voltage), and performing a 425° C. thermal treatment for 600 seconds for enabling a fluorine-ion structure to occupy stably the space inside said i-AlxGaN layer for forming said fluorine-ion structure in said i-AlxGaN layer;

fabricating a first gate dielectric layer on said fluorine-ion structure; and

forming an enhancement-mode N-face AlGaN/GaN high electron mobility transistor with polarity inversion of GaN and including said fluorine-ion structure for controlling a two-dimensional electron gas below said fluorine-ion structure to be depleted, depositing a passivation dielectric layer with larger compressive stress (dielectric constant n˜1.45) or with larger expansive stress (dielectric constant n˜2.0) and with thickness greater than 200 nanometers, inverting said i-AlxGaN layer/said i-GaN channel layer/said i-AlyGaN layer in an active region of said epitaxial layer from a N-face polarity to a Ga-face polarity for raising said two-dimensional electron gas from the junction of said i-GaN channel layer/said i-AlyGaN layer to the junction of said i-GaN channel layer/said i-AlxGaN layer;

where x=0.1˜0.3 and y=0.05˜0.75.

2. The method of claim 1 , wherein said step of forming said fluorine-ion structure in said i-AlxGaN layer further comprises steps of:

defining a region for implanting fluorine ions into said i-AlxGaN layer using photolithography;

generating said fluorine-ion plasma in a dry etching system or an ion implantation system using CF4;

implanting fluorine ions into said i-AlxGaN layer (x=0.1˜0.3) under a specific electric field (or a specific voltage); and

performing a 425° C. thermal treatment for 600 seconds for enabling said fluorine-ion structure to occupy stably the space inside said i-AlxGaN layer.

Priority Claims (1)
TW 106118758 A · Jun 6, 2017 · national
Continuity (1)
Related Publication 20180350933A1 · Dec 6, 2018
Cited By (1)
US 12,707,667