LOW RESISTANCE CONTACT STRUCTURES FOR TRENCH STRUCTURES
An electrical device including at least one contact surface and an interlevel dielectric layer present atop the electrical device, wherein the interlevel dielectric layer includes at least one trench to the at least one contact surface of the electrical device. A conformal titanium liner is present on the sidewalls of the trench and is in direct contact with the at least one contact surface. The conformal titanium liner may be composed of 100 wt. % titanium, and may have a thickness ranging from 10 Å to 100 Å.
1 . A semiconductor device comprising:
a channel region of the semiconductor device, wherein source and drain regions that are positioned on opposing sides of the channel region;
a gate structure on the channel region of the semiconductor device; and
a contact to at least one of the source and drain regions, the contact including a conformal titanium liner that is present on the sidewalls of a trench through an interlevel dielectric to the source and drain regions, and a metal fill comprising ruthenium (Ru), rhodium (Rh), iridium (Ir), osmium (Os), molybdenum (Mo), copper (Cu) or a combination thereof.
2 . The semiconductor device of claim 1 , wherein the conformal titanium liner comprises 100 wt. % titanium.
3 . The semiconductor device of claim 1 , wherein the conformal titanium liner comprises a thickness ranging from 10 Å to 100 Å.
4 . The semiconductor device of claim 1 , wherein the conformal titanium liner is in direct contact with the source and drain regions, and the metal fill is in direct contact with the conformal titanium liner, wherein the trench is entirely filled by the conformal titanium liner and the metal fill.
5 . The semiconductor device of claim 1 , wherein the semiconductor device comprises a field effect transistor.
6 . The semiconductor device of claim 5 , wherein a channel region of the field effect transistor is provided by a type IV semiconductor substrate.
7 . The semiconductor device of claim 6 , wherein the contact surface is provided by source and drain region portions of the field effect transistor.
8 . The semiconductor device of claim 7 , wherein the contact surface comprises a metal semiconductor alloy region that is in direct contact with the conformal titanium liner.
9 . The semiconductor device of claim 8 , wherein the metal semiconductor alloy is a silicide.
10 . A semiconductor device comprising:
a channel region of the semiconductor device, wherein source and drain regions that are positioned on opposing sides of the channel region;
a metal semiconductor alloy region that is in direct contact with the at least one contact surface of the source and drain regions;
a gate structure on the channel region of the semiconductor device; and
a contact to at least one of the metal semiconductor alloy region of the source and drain regions, the contact including a conformal titanium liner that is present on the sidewalls of a trench through an interlevel dielectric to the source and drain regions, and a metal fill comprising ruthenium (Ru), rhodium (Rh), iridium (Ir), osmium (Os), molybdenum (Mo), copper (Cu) or a combination thereof.
11 . The semiconductor device of claim 10 , wherein the conformal titanium liner comprises 100 wt. % titanium.
12 . The semiconductor device of claim 10 , wherein the conformal titanium liner comprises a thickness ranging from 10 Å to 100 Å.
13 . The semiconductor device of claim 10 , wherein the metal semiconductor alloy is a silicide.
14 . A semiconductor device comprising:
a channel region of the semiconductor device, wherein source and drain regions that are positioned on opposing sides of the channel region;
a gate structure on the channel region of the semiconductor device; and
a contact to at least one of the source and drain regions, the contact including a conformal titanium liner of substantially 100 wt. % titanium that is present on the sidewalls of a trench through an interlevel dielectric to the source and drain regions, and a metal fill comprising ruthenium (Ru), rhodium (Rh), iridium (Ir), osmium (Os), molybdenum (Mo), copper (Cu) or a combination thereof.
15 . The semiconductor device of claim 14 , wherein the conformal titanium liner comprises a thickness ranging from 10 Å to 100 Å.
16 . The semiconductor device of claim 14 , wherein the conformal titanium liner is in direct contact with the source and drain regions, and the metal fill is in direct contact with the conformal titanium liner
17 . The semiconductor device of claim 16 , wherein the trench is entirely filled by the conformal titanium liner and the metal fill.
18 . The semiconductor device of claim 16 , wherein a contact surface is provided by source and drain region portions of the field effect transistor that are provided by a type IV semiconductor.
19 . The semiconductor device of claim 18 , wherein the contact surface comprises a metal semiconductor alloy region that is in direct contact with the conformal titanium liner.
20 . The semiconductor device of claim 18 , wherein the metal semiconductor alloy is a silicide.