Forming semiconductor structures with two-dimensional materials
The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS 2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
1. A method, comprising:
forming a first layer of a first two-dimensional material over a substrate, the first two-dimensional material of the first layer having a semiconductor property; and
forming a second layer of a second two-dimensional material of antimonene over the first layer of the first two-dimensional material, the second two-dimensional material being different from the first two-dimensional material;
wherein the forming the second layer of antimonene includes:
growing a layer of antimony over the first layer of the first two-dimensional material; and
forming the second layer of antimonene by annealing the layer of antimony with an annealing temperature ranging from about 200° C. to about 400° C.
2. The method of claim 1 , wherein the first two-dimensional material is a transition metal dichalcogenide (TMD) material.
3. The method of claim 2 , wherein the TMD material is molybdenum disulfide.
4. The method of claim 3 , wherein the providing the wafer includes:
depositing a layer of molybdenum over the substrate; and
forming the two-dimensional molybdenum disulfide from molybdenum in the layer of molybdenum.
5. The method of claim 1 , wherein the forming further includes growing the second layer of antimonene with a growth temperature ranging from about 20° C. to about 320° C. for a time duration ranging from about 10 seconds to about 600 seconds.
6. The method of claim 1 , wherein the annealing lasts for about 7 to 15 minutes.
7. The method of claim 1 , further comprising reducing a thickness of the second layer of the second two-dimensional material.
8. A method, comprising:
forming a first layer of a first two-dimensional material over a substrate, the first layer of the first two-dimensional material having a semiconductor property;
defining an active area by patterning the first layer of the first two-dimensional material; and
forming a source/drain region including a second layer of a second two-dimensional material over the active area of the first layer of the first two-dimensional material, the second layer of the second two-dimensional material having a semimetal property.
9. The method of claim 8 , wherein the substrate includes sapphire.
10. The method of claim 8 , wherein the first two-dimensional material is molybdenum disulfide.
11. The method of claim 8 , wherein the second two-dimensional material is antimonene.
12. The method of claim 11 , wherein the forming the source/drain region includes at least one or more of:
growing the second layer of antimonene with a growth temperature ranging from about 20° C. to about 320° C. for a time duration ranging from about 10 seconds to about 600 seconds; or
annealing a layer of antimony for about 7 to 15 minutes with an annealing temperature ranging from about 200° C. to about 400° C.
13. The method of claim 12 , further comprising forming a conductive contact electrode over the source/drain region, wherein the annealing is conducted after the conductive contact electrode is formed.
14. The method of claim 8 , further comprising:
forming a dielectric layer over the first layer of the first two-dimensional material adjacent to the source/drain region; and
forming a gate electrode over the dielectric layer, the gate electrode being separated from the first layer of the first two-dimensional material by the dielectric layer.
15. A method, comprising:
forming a channel region over a substrate, the channel region including a first two-dimensional material of antimonene having a semiconductor property;
forming a source/drain structure at least partially over the channel region, the source drain structure including a second two-dimensional material having a semimetal property; and
forming a gate structure over the channel region, the gate structure including a gate dielectric and a gate electrode over the gate dielectric;
wherein the forming the channel region includes:
depositing a layer of antimony over a layer of a third two-dimensional material over the substrate, and
forming the antimonene of the channel region by annealing the layer of antimony with an annealing temperature ranging from about 200° C. to about 400° C.
16. The method of claim 15 , wherein the second two-dimensional material is antimonene.
17. The method of claim 16 , wherein the second two-dimensional material is a β allotrope of antimonene.
18. The method of claim 15 , wherein the third two-dimensional material is molybdenum disulfide.