Semiconductor package including heat sink

1. A semiconductor package, comprising:

a package base substrate;

at least one semiconductor chip on the package base substrate;

a heat sink attached on the at least one semiconductor chip, the heat sink including a base and a plurality of protrusion patterns on a top of the base; and

a molding covering a top of the package base substrate, a side surface of the at least one semiconductor chip, and a side surface of the heat sink without covering a top of the heat sink,

wherein:

the molding includes a filler, and

a diameter of particles of the filler is greater than an interval between adjacent protrusion patterns of the plurality of protrusion patterns.

2. The semiconductor package as claimed in claim 1 , wherein an uppermost end of the molding and a top of each of the plurality of protrusion patterns of the heat sink are on a same level.

3. The semiconductor package as claimed in claim 1 , wherein the plurality of protrusion patterns of the heat sink is arranged in a honeycomb structure on the top of the base.

4. The semiconductor package as claimed in claim 1 , wherein each protrusion pattern of the plurality of protrusion patterns has a circular horizontal cross-sectional surface.

5. The semiconductor package as claimed in claim 1 , further comprising:

a bonding wire electrically connecting the at least one semiconductor chip to the package base substrate; and

a heat sink attach film between the at least one semiconductor chip and the heat sink, the heat sink attach film having a same horizontal area as a horizontal area of the heat sink,

wherein:

a portion of the bonding wire is buried in the heat sink attach film, and

the bonding wire is spaced apart from the heat sink without contacting the heat sink.

6. The semiconductor package as claimed in claim 1 , wherein:

a horizontal area of the heat sink is greater than a horizontal area of the at least one semiconductor chip, and

the heat sink overlaps all of the at least one semiconductor chip in a vertical direction.

7. The semiconductor package as claimed in claim 1 , wherein a horizontal area of the heat sink is the same as a horizontal area of the at least one semiconductor chip.

8. The semiconductor package as claimed in claim 1 , further comprising an electromagnetic shield covering a side surface of the package base substrate, a side surface and a top of the molding, and a top of the heat sink.

9. The semiconductor package as claimed in claim 8 , wherein a portion of the electromagnetic shield on the heat sink forms an embossing pattern that includes a top having a concave-convex structure.

10. The semiconductor package as claimed in claim 8 , wherein the electromagnetic shield fills a space between protrusion patterns of the plurality of protrusion patterns and has a flat top on the heat sink.

11. A semiconductor package, comprising:

a package base substrate;

at least one semiconductor chip on the package base substrate;

a heat sink attached on the at least one semiconductor chip, the heat sink including a base and a plurality of protrusion patterns on a top of the base;

a heat sink attach film covering a bottom of the heat sink, the heat sink attach film being between the heat sink and the at least one semiconductor chip;

a conductive heat dissipation terminal passing through the heat sink attach film to contact the heat sink;

a molding covering a top of the package base substrate, a side surface of the at least one semiconductor chip, and a side surface of the heat sink; and

an electromagnetic shield covering a side surface of the package base substrate, a side surface and a top of the molding, and a top of the heat sink,

wherein the conductive heat dissipation terminal fills a through via hole having a bottom and that passes through the heat sink attach film and the molding to the top of the package base substrate or a top of the at least one semiconductor chip.

12. The semiconductor package as claimed in claim 11 , wherein the conductive heat dissipation terminal connects a bottom of the base of the heat sink to the top of the package base substrate.

13. The semiconductor package as claimed in claim 11 , wherein:

the through via hole passes through the heat sink, the heat sink attach film, and the molding to the top of the package base substrate, and

the electromagnetic shield covers a top of the conductive heat dissipation terminal.

14. The semiconductor package of claim 11 , wherein the conductive heat dissipation terminal connects a bottom of the base of the heat sink to the top of the at least one semiconductor chip.

15. The semiconductor package as claimed in claim 11 , further comprising a bonding wire electrically connecting the at least one semiconductor chip to the package base substrate,

wherein a portion of the bonding wire is buried in the heat sink attach film, and an uppermost end of the bonding wire is on a level that is lower than a bottom of the base.

16. The semiconductor package as claimed in claim 11 , wherein:

each protrusion pattern of the plurality of protrusion patterns has a circular horizontal cross-sectional surface

the plurality of protrusion patterns is arranged in a honeycomb structure on the top of the base, and

the molding includes a filler, a diameter of particles of the filler being greater than an interval between protrusion patterns of the plurality of protrusion patterns.

17. A semiconductor package, comprising:

a package base substrate;

a semiconductor chip on the package base substrate;

a heat sink attached on the semiconductor chip, the heat sink including a base and a plurality of protrusion patterns on a top of the base;

a heat sink attach film covering a bottom of the heat sink, the heat sink attach film being between the heat sink and the semiconductor chip;

a bonding wire electrically connecting the semiconductor chip to the package base substrate, a portion of the bonding wire being buried in the heat sink attach film;

a molding covering a top of the package base substrate, a side surface of the semiconductor chip, and a side surface of the heat sink; and

an electromagnetic shield contacting a side surface of the package base substrate, a side surface and a top of the molding, and a top of the heat sink,

wherein a thickness of the electromagnetic shield is greater than a vertical height of each of the plurality of protrusions of the heat sink.

18. The semiconductor package as claimed in claim 17 , wherein an uppermost end of the molding and an uppermost end of the heat sink are on a same level.

19. The semiconductor package as claimed in claim 17 , further comprising a conductive heat dissipation terminal passing through the heat sink attach film to contact the heat sink, and contacting at least one of the top of the package base substrate and a top of the semiconductor chip.