IP Library Granted Patent US 10,553,451
Granted Patent B2
US 10,553,451 · App. 16/017,735 · Granted Feb 4, 2020

Semiconductor device and manufacturing method thereof

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Quick Facts
Patent No.
US 10,553,451
App. No.
16/017,735
Granted
Feb 4, 2020
Kind
B2
Abstract

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

Claims (45)

1. A method of manufacturing a semiconductor package, the method comprising:

providing a first structure (S 1 ) comprising:

a carrier; and

an S 1 dielectric layer directly on the carrier,

wherein the first structure comprises a first S 1 side facing away from the carrier, and a second S 1 side opposite the first S 1 side;

forming a signal distribution structure (SDS) on the first S 1 side, the signal distribution structure comprising:

an SDS dielectric layer; and

an SDS conductive layer that laterally routes electrical signals;

after said forming the signal distribution structure, removing the carrier; and

attaching a semiconductor die to a side of the signal distribution structure from which the carrier was removed.

2. The method of claim 1 , wherein said attaching the semiconductor die to the side of the signal distribution structure comprises attaching the semiconductor die directly to the side of the signal distribution structure.

3. The method of claim 1 , wherein said forming the signal distribution structure comprises sequentially forming the SDS conductive layer and the SDS dielectric layer after said providing the first structure.

4. The method of claim 1 , wherein the first S 1 dielectric layer of the provided first structure has no apertures.

5. The method of claim 1 , wherein the signal distribution structure is TSV-less.

6. The method of claim 1 , wherein the carrier comprises glass.

7. The method of claim 1 , comprising after said removing the carrier, forming at least a portion of a conductive interconnection structure, wherein a first end of the conductive interconnection structure directly contacts the SDS conductive layer, a middle portion of the conductive interconnection structure passes through the S 1 dielectric layer, and a second end of the conductive interconnection structure comprises a die interconnection pad.

8. The method of claim 1 , wherein said attaching the semiconductor die to the side of the signal distribution structure comprises adhering the semiconductor die to the side of the signal distribution structure.

9. A method of manufacturing a semiconductor package, the method comprising:

providing a structure comprising:

a first structure (S 1 ) comprising:

a carrier; and

an S 1 dielectric layer directly on the carrier, wherein the first structure comprises a first S 1 side facing away from the carrier, and a second S 1 side opposite the first S 1 side; and

a signal distribution structure (SDS) on the first S 1 side, the signal distribution structure comprising:

an SDS dielectric layer; and

an SDS conductive layer that laterally routes electrical signals;

removing the carrier from the provided structure; and

attaching a semiconductor die to a side of the signal distribution structure from which the carrier was removed.

10. The method of claim 9 , wherein said attaching the semiconductor die to the side of the signal distribution structure comprises attaching the semiconductor die directly to the side of the signal distribution structure.

11. The method of claim 10 , wherein said attaching the semiconductor die directly to the side of the signal distribution structure comprises adhering the semiconductor die directly to the side of the signal distribution structure.

12. The method of claim 9 , wherein the signal distribution structure is TSV-less.

13. The method of claim 9 , wherein the carrier comprises glass.

14. The method of claim 9 , comprising after said removing the carrier, forming at least a portion of a conductive interconnection structure, wherein a first end of the conductive interconnection structure directly contacts the SDS conductive layer, a middle portion of the conductive interconnection structure passes through the S 1 dielectric layer, and a second end of the conductive interconnection structure comprises a die interconnection pad.

15. A method of manufacturing a semiconductor package, the method comprising:

providing a structure comprising:

a carrier;

a first dielectric layer directly on the carrier;

a conductive layer on the first dielectric layer; and

a second dielectric layer on the conductive layer;

after said receiving the structure, removing the carrier from the structure; and

after said removing the carrier from the structure, coupling a semiconductor die to a side of the structure from which the carrier was removed,

wherein said coupling the semiconductor die to the side of the structure from which the carrier was removed comprises directly coupling the semiconductor die to the side of the structure.

16. The method of claim 15 , comprising after said removing the carrier from the structure, forming at least a portion of a conductive interconnection structure, wherein a first end of the conductive interconnection structure directly contacts the conductive layer, a middle portion of the conductive interconnection structure passes through the first dielectric layer, and a second end of the conductive interconnection structure comprises a die interconnection pad.

17. The method of claim 15 , comprising removing at least a portion of the first dielectric layer.

18. The method of claim 15 , wherein said directly coupling the semiconductor die to the side of the structure comprises adhering the semiconductor die directly to the side of the structure.

19. The method of claim 15 , wherein the structure is TSV-less.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2022
From: KIM, DO HYUNG
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 061237/0835 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054046/0673 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2019
From: KIM, DONG JIN; KIM, JIN HAN; DO, WON CHUL; BAE, JAE HUN; KI, WON MYOUNG; HAN, DONG HOON; LEE, JI HUN; PARK, JUN HWAN; SON, SEUNG NAM; CHO, HYUN; ZWENGER, CURTIS
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 048284/0904 →