IP Library › Granted Patent US 10,446,409
Granted Patent B2
US 10,446,409 · App. 16/019,772 · Granted Oct 15, 2019

Method of manufacturing semiconductor device

Inventor: Naoki Kuneshita (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L21/31116H01L21/768
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Quick Facts
Patent No.
US 10,446,409
App. No.
16/019,772
Granted
Oct 15, 2019
Kind
B2
Abstract

An interlayer insulating film is dry etched using a CHF 3 gas and by using, as a mask, a resist film having a first opening and a second opening that is wider than the first opening, thereby forming a first contact hole of a predetermined depth in the first opening and forming a second contact hole in the second opening. The gas in a furnace is switched to a C 4 F 8 gas and the first contact hole is embedded with a polymer by the C 4 F 8 gas. The gas in the furnace is switched to a CHF 3 gas. With the first contact hole protected by the polymer, the interlayer insulating film is dry etched using the same resist film as a mask, making a depth of the second contact hole a predetermined depth deeper than that of the first contact hole. Thereafter, the resist film and the polymer are removed.

Claims (43)

1. A method of manufacturing a semiconductor device having a plurality of contact holes of differing depths, the method comprising:

(a) forming an interlayer insulating film on a semiconductor substrate;

(b) forming on the interlayer insulating film, a resist film having a first opening and a second opening having a width that is greater than a width of the first opening;

(c) dry etching the interlayer insulating film using the resist film as a mask, to concurrently form a first contact hole and a second contact hole, wherein

the step (c) further includes

forming the first contact hole at the first opening in which a part of the interlayer insulating film is exposed, the first contact hole having a first depth, and

forming the second contact hole at the second opening in which a part of the interlayer insulating film is exposed, the second contact hole having a second depth;

(d) depositing a reaction product produced from a first gas, so as to embed the reaction product in the first contact hole;

(e) after the step (d), further dry etching, with the reaction product embedded in the first contact hole, the interlayer insulating film, thereby to extend the depth of the second contact hole from the second depth to a third depth, the third depth being greater than the first depth of the first contact hole;

(f) removing the resist film; and

(g) removing the reaction product and exposing the first contact hole.

2. The method according claim 1 , wherein

the step (c) includes introducing a second gas into a chamber to perform the dray etching,

the step (d) includes introducing a first gas into the chamber to depositing the reaction product, the method further comprising

switching a gas to be introduced into the chamber from the second gas to the first gas, after the step (c) and before the step (d).

3. The method according to claim 2 , further comprising

switching a gas to be introduced into the chamber from the first gas to a third gas, after the step (d) and before the step (e).

4. The method according to claim 3 , wherein the second gas and the third gas contain—a same gas species.

5. The method according to claim 1 , wherein

the step (c) includes dry etching the interlayer insulating film using a mixed gas containing the first gas,

the step (d) includes introducing the mixed gas containing the first gas, and depositing the reaction product produced from the mixed gas, and

the step (e) includes dry etching the interlayer insulating film using the mixed gas.

6. The method according to claim 1 , further comprising:

forming a poly-silicon layer disposed on the semiconductor substrate; and

forming in the first contact hole, a first electrode layer that forms a contact with the poly-silicon layer after the step (g), wherein

the step (c) includes making the first depth of the first contact hole a depth that reaches a surface of the poly-silicon layer disposed on the semiconductor substrate.

7. The method according to claim 1 , wherein

the step (f) includes making the third depth of the second contact hole a depth that reaches a surface of the semiconductor substrate, and

the method further comprising

forming in the second contact hole, a second electrode layer that forms a contact with the semiconductor substrate after the step (g).

8. The method according to claim 7 , further comprising

dry etching the semiconductor substrate using the resist film as a mask after the step (e) and before the step (g), thereby further increasing the depth of the second contact hole, wherein

forming the second electrode layer includes forming at a side wall of the second contact hole, a contact of the semiconductor substrate and the second electrode layer.

9. A method of manufacturing a semiconductor device having a plurality of contact holes of differing depths, the method comprising:

(a) forming an interlayer insulating film on a semiconductor substrate;

(b) forming on the interlayer insulating film, a resist film having a first opening and a second opening having a width that is greater than a width of the first opening;

(c) introducing one gas in a chamber to dry etch the interlayer insulating film using the resist film as a mask, so as to

form at the first opening in which a part of the interlayer insulating film is exposed, a first contact hole having a first depth, and

form at the second opening in which a part of the interlayer insulating film is exposed, a second contact hole having a second depth;

(d) after step (c), switching a gas to be introduced into the chamber from the one gas to an other gas, thereby to produce a reaction product to be embedded in the first contact hole;

(e) after the step (d), further dry etching, with the reaction product embedded in the first contact hole, the interlayer insulating film, thereby to extend the depth of the second contact hole from the second depth to a third depth, the third depth being greater than the first depth of the first contact hole;

(f) removing the resist film; and

(g) removing the reaction product and exposing the first contact hole.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2018
From: KUNESHITA, NAOKI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 046216/0535 →
Priority Claims (1)
JP 2017-164811 · Aug 29, 2017 · national
Continuity (1)
Related Publication 20190067029A1 · Feb 28, 2019