Memory system and method for bad block management

1. A non-volatile data storage device, comprising:

memory cells arranged in blocks, each block including multiple pages and each page having a number of memory cells;

a memory controller coupled to the memory cells for controlling erase, program, and read operations of the memory cells;

wherein each block is identified as a good block, degraded block, or bad block based on a count of bad pages in the block, and each block being identified:

as a good block if the count of bad pages is zero;

as a degraded block if the count of bad pages is below a threshold number; and

as a bad block if the count of bad pages is above or equal to the threshold number;

a table of degraded blocks that, for each degraded block, lists a count of bad pages in the degraded block and locations of bad pages in the degraded block;

wherein the memory controller is configured to:

receive information regarding a bad page;

determine if the bad page is in a good block or degraded block;

upon determining that the bad page is in a good block, identify the good block as a degraded block and create an entry in the table of degraded blocks;

upon determining that the bad page is in a degraded block, locate the degraded block in the table of degraded blocks, increase the count of bad pages in the degraded block, and record the location of the bad page;

determine if the count of bad pages is greater than the threshold number;

upon determining that the count of bad pages is greater than the threshold number, determine that the block is a bad block;

wherein the memory controller is configured to use good blocks and degraded blocks for read and program operations, and not use the bad blocks.

2. The non-volatile data storage device of claim 1 , wherein, receiving information regarding a bad page comprises:

performing a read operation at a target page address;

determining if a read failure has occurred;

upon detecting a read failure, identifying the page as a bad page;

recovering correct data in the page at the target page address;

copying the correct data to a good block.

3. The non-volatile data storage device of claim 1 , wherein the memory controller is configured to:

receive a target page address for a program operation;

determine if the target page address is in a good block, bad block, or a degraded block;

upon determining that the target page address is in a good block, perform the program operation at the target page address;

upon determining that the target page address is in a bad block, perform the program operation in a replacement block;

upon determining that the target page address is in a degraded block, determine if the target page address is directed to a bad page;

upon determining that the target page address is not directed to a bad page, perform the program operation at the target page address; and

upon determining that the target page address is directed to a bad page, perform the program operation at a replacement page address.

4. The non-volatile data storage device of claim 1 , further comprising multiple super blocks, each super block including a plurality of blocks, wherein one of the plurality of blocks is configured as a parity block and other blocks are configured as data blocks, the parity block being configured to store parity information of the data blocks;

wherein the memory controller is configured to:

determine if a super block includes a degraded block; and

upon determining that the super block includes a degraded block, configure the degraded block as the parity block for the super block.

5. The non-volatile data storage device of claim 4 , further comprising multiple super pages, each super page including a plurality of pages, with one page from each block in the super block, wherein one of the plurality of pages in a super page is configured as a parity page and other pages are configured as data pages, the parity page being configured to store parity information of the data pages;

wherein the memory controller is configured to:

determine if a super page includes a bad page; and

upon determining that the super page includes a bad page, exclude the bad page from operation and configure one of the remaining pages as a parity page and the other remaining pages as data pages.

6. The non-volatile data storage device of claim 1 , further comprising multiple super blocks, each super block including a plurality of blocks, wherein the memory controller is configured to:

rank the plurality of blocks according to a reliability quality; and

configure the block with the lowest reliability as a parity block and other blocks are configured as data blocks, the parity block being configured to store parity information of the data blocks.

7. The non-volatile data storage device of claim 1 , wherein each block comprises a plurality of memory cells coupled to a same word line.

8. A system, comprising:

memory cells arranged in blocks, each block including multiple pages and each page having a number of memory cells;

a memory controller coupled to the memory cells for controlling erase, program, and read operations of the memory cells;

wherein the memory controller is configured to:

identify a block as a good block, if a count of bad pages in the block is zero;

identify a block as a degraded block if the count of bad pages is below a threshold number; and

identify a block as a bad block if the count of bad pages is above or equal to the threshold number;

wherein the memory controller is configured to use good blocks and degraded blocks for read and program operations, and not use the bad blocks;

wherein the memory controller is configured to:

receive a target page address for a program operation;

determine if the target page address is in a good block, bad block, or a degraded block;

upon determining that the target page address is in a good block, perform the program operation at the target page address;

upon determining that the target page address is in a bad block, perform the program operation in a replacement block;

upon determining that the target page address is in a degrade block,

determine if the target page address is directed to a bad page;

upon determining that the target page address is not directed to a bad page, perform the program operation at the target page address; and

upon determining that the target page address is directed to a bad page, perform the program operation at a replacement page address.

9. The system of claim 8 , wherein the system further comprises a table of degraded blocks that, for each degraded block, lists a count of bad pages in the degraded block and locations of bad pages in the degraded block;

wherein the memory controller is configured to:

receive information regarding a bad page;

determine if the bad page is in a good block or degraded block;

upon determining that the bad page is in a good block, identify the good block as a degraded block and create an entry in the table of degraded blocks;

upon determining that the bad page is in a degraded block, locate the degraded block in the table of degraded blocks, increase the count of bad pages in the degraded block, and record the location of the bad page;

determine if the count of bad pages is greater than the threshold number;

upon determining that the count of bad pages is greater than the threshold number, determine that the block is a bad block.

10. The system of claim 8 , further comprising multiple super blocks, each super block including a plurality of blocks, wherein one of the plurality of blocks is configured as a parity block and other blocks are configured as data blocks, the parity block being configured to store parity information of the data blocks;

wherein the memory controller is configured to:

determine if a super block includes a degraded block; and

upon determining that the super block includes a degraded block, configure the degraded block as the parity block for the super block.

11. The system of claim 10 , further comprising multiple super pages, each super page including a plurality of pages, with one page from each block in the super block, wherein one of the plurality of pages in a super page is configured as a parity page and other pages are configured as data pages, the parity page being configured to store parity information of the data pages;

wherein the memory controller is configured to:

determine if a super page includes a bad page; and

upon determining that the super page includes a bad page, exclude the bad page from operation and configure one of the remaining pages as a parity page and the other remaining pages as data pages.

12. The system of claim 8 , further comprising multiple super blocks, each super block including a plurality of blocks, wherein the memory controller is configured to:

rank the plurality of blocks according to a reliability quality; and

configure the block with the lowest reliability as a parity block and other blocks are configured as data blocks, the parity block being configured to store parity information of the data blocks.

13. A method of controlling a storage system, the storage system including a plurality of memory cells arranged in blocks and a memory controller coupled to the plurality of memory cells for controlling data write and read in the plurality of memory cells, the method comprising:

identifying a block as a good block, if a count of bad pages in the block is zero;

identifying the block as a degraded block if the count of bad pages is below a threshold number;

identifying the block as a bad block if the count of bad pages is above or equal to the threshold number; and

using good blocks and degraded blocks for read and program operations, and not using the bad blocks;

wherein the storage system further comprises multiple super blocks, each super block including a plurality of blocks, wherein one of the plurality of blocks is configured as a parity block and other blocks are configured as data blocks, the parity block being configured to store parity information of the data blocks, the method further comprising:

determining if a super block includes a degraded block; and

upon determining that the super block includes a degraded block, configuring the degraded block as the parity block for the super block.

14. The method of claim 13 , wherein the system further comprises a table of degraded blocks that, for each degraded block, lists a count of bad pages in the degraded block and locations of bad pages in the degraded block, the method comprising:

receiving information regarding a bad page;

determining if the bad page is in a good block or degraded block;

upon determining that the bad page is in a good block, identifying the good block as a degraded block and create an entry in the table of degraded blocks;

upon determining that the bad page is in a degraded block, locating the degraded block in the table of degraded blocks, increasing the count of bad pages in the degraded block, and recording the location of the bad page;

determining if the count of bad pages is greater than the threshold number;

upon determining that the count of bad pages is greater than the threshold number, determining that the block is a bad block.

15. The method of claim 13 , further comprising:

receiving a target page address for a program operation;

determining if the target page address is in a good block, bad block, or a degraded block;

upon determining that the target page address is in a good block, performing the program operation at the target page address;

upon determining that the target page address is in a bad block, performing the program operation in a replacement block;

upon determining that the target page address is in a degrade block,

determining if the target page address is directed to a bad page;

upon determining that the target page address is not directed to a bad page, performing the program operation at the target page address; and

upon determining that the target page address is directed to a bad page, performing the program operation at a replacement page address.

16. The method of claim 13 wherein further comprising multiple super pages, each super page including a plurality of pages, with one page from each block in the super block, wherein one of the plurality of pages in a super page is configured as a parity page and other pages are configured as data pages, the parity page being configured to store parity information of the data pages, the method further comprising:

determining if a super page includes a bad page; and

upon determining that the super page includes a bad page, excluding the bad page from operation and configuring one of the remaining pages as a parity page and the other remaining pages as data pages.

17. The method of claim 13 , further comprising:

ranking the plurality of blocks according to a reliability quality; and

configuring the block with the lowest reliability as a parity block and other blocks are configured as data blocks, the parity block being configured to store parity information of the data blocks.

18. The method of claim 13 , wherein each block comprises a plurality of memory cells coupled to a same word line.