Controlling NAND operation latency

1. A device for controlling NAND operation latency, the device comprising:

a NAND array that includes several blocks, at least one physical block of the several physical blocks being closed; and

a controller to configured to:

receive a write request;

calculate a number of garbage collection operations to perform on the physical block that is closed, the calculation including addition of a logical-to-physical (L2P) region search ratio to a cadence calculation for garbage collection, the L2P region search ratio having a numerator equal to a count of entries in a block data structure that indicate a logical page correspondence to the physical block, and the L2P region search ratio having a denominator equal to a load-threshold parameter;

perform the calculated number of garbage collection operations on the physical block, for each garbage collection operation, given a page in the physical block, the controller is configured to:

search an L2P table to determine whether the page is valid, the search directed by the block data structure that includes an entry for each L2P table region, the entry indicating whether a logical page in the L2P table region corresponded to the physical block; and

write the page to a new physical block of the several blocks in response to the page being valid;

perform the write request in response to the calculated number of garbage collection operations being performed;

receive a second write request;

suspend the garbage collection operations in response to the count of entries in the block data structure being greater than the load-threshold parameter; and

perform the second write request.

2. The device of claim 1 , wherein, to add the L2P region search ratio to the cadence calculation, the controller adds the L2P region search ratio to the number of garbage collection writes.

3. The device of claim 1 , wherein the controller is configured to:

receive a third write request;

suspend the garbage collection operations in response to a second threshold number of garbage collection operations having been performed on the physical block in a garbage collection cycle; and

perform the third write request.

4. The device of claim 1 , wherein the cadence calculation is a ratio between garbage collection writes and host writes, wherein the garbage collection writes are a count of garbage collection operations to move every valid page from the physical block to the new physical block, and wherein the host writes is a parameter that defines a count of host writes over which to spread the garbage collection writes.

5. The device of claim 1 , wherein the block data structure is a bit map.

6. The device of claim 5 , wherein an entry in the data structure is a single bit, and wherein a logical one in an entry indicates that an L2P region corresponding to a position of the bit includes a logical page that corresponded to the physical block.

7. The device of claim 1 , wherein the data structure is written in the physical block.

8. A method for controlling NAND operation latency, the method comprising:

receiving a write request at a controller of a NAND device;

calculating a number of garbage collection operations to perform on a physical block that is closed, the calculating including adding a logical-to-physical (L2P) region search ratio to a cadence calculation for garbage collection, the L2P region search ratio having a numerator equal to a count of entries in a block data structure that indicate a logical page correspondence to the physical block, and the L2P region search ratio having a denominator equal to a load-threshold parameter;

performing the calculated number of garbage collection operations on the physical block, each garbage collection operation including, given a page in the physical block:

searching an L2P table to determine whether the page is valid, the searching directed by the block data structure that includes an entry for each L2P table region, the entry indicating whether a logical page in the L2P table region corresponded to the physical block; and

writing the page to a new physical block in response to the page being valid;

performing the write request in response to the calculated number of garbage collection operations being performed;

receiving a second write request;

suspending the garbage collection operations in response to the count of entries in the block data structure being greater than the load-threshold parameter; and

performing the second write request.

9. The method of claim 8 , wherein adding the L2P region search ratio to the cadence calculation includes adding the L2P region search ratio to the number of garbage collection writes.

10. The method of claim 8 , comprising:

receiving a third write request;

suspending the garbage collection operations in response to a second threshold number of garbage collection operations having been performed on the physical block in a garbage collection cycle; and

performing the third write request.

11. The method of claim 8 , wherein the cadence calculation is a ratio between garbage collection writes and host writes, wherein the garbage collection writes are a count of garbage collection operations to move every valid page from the physical block to the new physical block, and wherein the host writes is a parameter that defines a count of host writes over which to spread the garbage collection writes.

12. The method of claim 8 , wherein the block data structure is a bit map.

13. The method of claim 12 , wherein an entry in the data structure is a single bit, and wherein a logical one in an entry indicates that an L2P region corresponding to a position of the bit includes a logical page that corresponded to the physical block.

14. The method of claim 8 , wherein the data structure is written in the physical block.

15. A non-transitory machine readable medium including instructions for controlling NAND operation latency, the instructions, when executed by processing circuitry of a machine, cause the processing circuitry to perform operations comprising:

receiving a write request at a controller of a NAND device;

calculating a number of garbage collection operations to perform on a physical block that is closed, the calculating including adding a logical-to-physical (L2P) region search ratio to a cadence calculation for garbage collection, the L2P region search ratio having a numerator equal to a count of entries in a block data structure that indicate a logical page correspondence to the physical block, and the L2P region search ratio having a denominator equal to a load-threshold parameter;

performing the calculated number of garbage collection operations on the physical block, each garbage collection operation including, given a page in the physical block:

searching an L2P table to determine whether the page is valid, the searching directed by the block data structure that includes an entry for each L2P table region, the entry indicating whether a logical page in the L2P table region corresponded to the physical block; and

writing the page to a new physical block in response to the page being valid;

performing the write request in response to the calculated number of garbage collection operations being performed;

receiving a second write request;

suspending the garbage collection operations in response to the count of entries in the block data structure being greater than the load-threshold parameter; and

performing the second write request.

16. The non-transitory machine readable medium of claim 15 , wherein adding the L2P region search ratio to the cadence calculation includes adding the L2P region search ratio to the number of garbage collection writes.

17. The non-transitory machine readable medium of claim 15 , wherein the operations comprise:

receiving a third write request;

suspending the garbage collection operations in response to a second threshold number of garbage collection operations having been performed on the physical block in a garbage collection cycle; and

performing the third write request.

18. The non-transitory machine readable medium of claim 15 , wherein the cadence calculation is a ratio between garbage collection writes and host writes, wherein the garbage collection writes are a count of garbage collection operations to move every valid page from the physical block to the new physical block, and wherein the host writes is a parameter that defines a count of host writes over which to spread the garbage collection writes.

19. The non-transitory machine readable medium of claim 15 , wherein the block data structure is a bit map.

20. The non-transitory machine readable medium of claim 19 , wherein an entry in the data structure is a single bit, and wherein a logical one in an entry indicates that an L2P region corresponding to a position of the bit includes a logical page that corresponded to the physical block.

21. The non-transitory machine readable medium of claim 15 , wherein the data structure is written in the physical block.