IP Library Granted Patent US 11,469,189
Granted Patent B2
US 11,469,189 · App. 16/024,675 · Granted Oct 11, 2022

Inductor and transmission line with air gap

Inventor: Kevin Lin (Beaverton, OR)
Assignee: Intel Corporation
H01L23/66H01L21/31111H01L21/7682H01L21/76802H01L21/76834H01L21/76877H01L23/5227H01L23/5283H01L23/5329H01L28/10H01L2223/6627H01L2223/6661
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Quick Facts
Patent No.
US 11,469,189
App. No.
16/024,675
Granted
Oct 11, 2022
Kind
B2
Abstract

An integrated circuit structure comprises one or more sets of first and second conductive lines along a same direction in an interlayer dielectric (ILD), the first and second conductive lines having a width greater than 2 μm. An air gap is in the ILD between the first and second conductive lines, the air gap extending across the ILD to sidewalls of the first and second conductive lines.

Claims (15)

1. A multi-turn inductor, comprising:

one or more sets of first and second conductive lines along a same direction in an interlayer dielectric (ILD), the first and second conductive lines having a width greater than 2 μm;

an air gap in the ILD between the first and second conductive lines, the air gap extending across the ILD to sidewalls of the first and second conductive lines; and

one or more spacers along at least one top corner of the air gap and at least one sidewall of the first and second conductive lines, where the one or more spacers are coplanar with a top surface of the first and second conductive lines, and have a depth less than half a depth of the first and second conductive lines.

2. The multi-turn inductor of claim 1 , wherein the width of the air gap and a distance between the first and second conductive lines is approximately 1 to 10 μm.

3. The multi-turn inductor of claim 1 , wherein the one or more spacers leave an opening in the air gap of approximately 100-300 nm.

4. The multi-turn inductor of claim 1 , wherein the air gap includes left and right spacers formed along the sidewalls of the first and second conductive lines, respectively.

5. The multi-turn inductor of claim 1 , wherein the air gap is formed as a continuous recess between the first and second conductive lines.

6. The multi-turn inductor of claim 1 , wherein the air gap is formed as non-contiguous air gap segments that are spaced apart by the ILD to provide structural support to the sidewalls of the first and second conductive lines.

7. The multi-turn inductor of claim 6 , wherein the non-contiguous air gap segments are greater than 10 μm in length.

8. The multi-turn inductor of claim 1 , further comprising a dielectric layer conformally formed over the ILD, a top surface of the first and second conductive lines, and the top of the air gap.

9. The multi-turn inductor of claim 1 , wherein the first and second conductive lines have a depth greater than 2 μm.

10. The multi-turn inductor of claim 1 , wherein the first and second conductive lines have a depth of approximately 2 to 6 μm.

11. The multi-turn inductor of claim 1 , wherein the first conductive line is in an outer turn of the multi-turn inductor and the second conductive line is in an inner turn of the multi-turn inductor.

12. The multi-turn inductor of claim 1 , wherein the first and second conductive lines comprise transmission lines.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072915/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2019
From: LIN, KEVIN
To: INTEL CORPORATION
Reel/Frame 048401/0179 →
Continuity (1)
Related Publication 20200006261A1 · Jan 2, 2020