Method of forming a semiconductor device comprising at least one germanium nanowire
Example embodiments relate to germanium nanowire fabrication. One embodiment includes a method of forming a semiconductor device that includes at least one Ge nanowire. The method includes providing a semiconductor structure that includes at least one, the at least one fin including a stack of at least one Ge layer alternative with SiGe layers. The method also includes at least partially oxidizing the SiGe layer into SiGeO x . Further, the method includes capping the fin with a dielectric material. In addition, the method includes annealing. Still further, the method includes selectively removing the dielectric material and the SiGeO x .
1. A method of forming a semiconductor device comprising at least one Ge nanowire, the method comprising steps:
providing a semiconductor structure comprising at least one fin, the at least one fin comprising a stack of at least one Ge layer alternated with SiGe layers;
at least partially oxidizing the SiGe layers into SiGeOx;
capping the at least one fin with a dielectric material;
annealing the semiconductor structure; and
selectively removing the dielectric material and the SiGeO x .
2. The method according to claim 1 , further comprising repeating the steps of at least partially oxidizing, capping, annealing, and selectively removing.
3. The method according to claim 1 , wherein selectively removing the dielectric material and the SiGeO x comprises wet etching.
4. The method according to claim 3 , wherein HF is used as an etchant in the wet etching.
5. The method according to claim 1 , wherein a temperature during the at least partially oxidizing is below 450° C.
6. The method according to claim 1 , wherein a temperature during the annealing of the semiconductor structure is above 500° C.
7. The method according to claim 1 , wherein the at least one fin of the semiconductor structure is formed on a Ge substrate.
8. The method according to claim 1 , wherein the at least one fin of the semiconductor structure is formed on a SiGe substrate.
9. The method according to claim 1 , wherein the at least one fin of the semiconductor structure is formed on a strain-relaxed buffer.
10. The method according to claim 1 , wherein the dielectric material for capping the at least one fin comprises SiO 2 .
11. The method according to claim 1 , further comprising an oxidizing, capping, annealing, and selectively removing the dielectric material and the SiGeO x until releasing of the at least one Ge layer to obtain the at least one Ge nanowire.
12. The method according to claim 1 , further comprising selectively removing remaining SiGe until releasing of the at least one Ge layer to obtain the at least one Ge nanowire.
13. The method according to claim 12 , further comprising applying a gate stack around the at least one Ge nanowire.