Communication techniques applying low-density parity-check code base graph selection

1. A method for wireless communications by a user equipment (UE) comprising a processor in electrical communication with a memory, the processor configured to obtain data from the memory in preparation for wireless communications, the method comprising:

receiving, by a transceiver circuit using one or more antenna elements in electrical communication with the transceiver circuit, control information indicating a modulation and coding scheme (MCS) and resource allocation (RA) for transmission of a codeword;

selecting, by the processor and based on the MCS and the RA, a base graph (BG), from which to derive a low density parity check (LDPC) code for use in decoding the codeword;

receiving, by the transceiver circuit using the one or more antenna elements, the codeword via resources of the RA; and

decoding, by a decoder circuit, the codeword using the LDPC code derived from the selected BG.

2. The method of claim 1 , wherein selecting the BG comprises selecting the BG from a set of two base graphs.

3. The method of claim 1 , wherein selecting the BG comprises:

determining a coding rate based on the MCS;

calculating a code block size (CBS) based on the coding rate and the RA; and

selecting the BG based on the CBS and the coding rate.

4. The method of claim 3 , wherein selecting the BG further comprises:

selecting a first BG from a set of two base graphs when:

the CBS is less than or equal to 292 bits,

the coding rate is less than or equal to 0.25, or

the CBS is less than or equal to 3824 bits and the coding rate is less than or equal to 0.67; and

selecting the second BG from the set of the two base graphs when the first BG is not selected.

5. A method for wireless communications by a base station (BS) comprising a processor in electrical communication with a memory, the processor configured to obtain data from the memory in preparation for wireless communications, the method comprising:

selecting, by the processor and based on a modulation and coding scheme (MCS) and a resource allocation (RA) for transmitting a codeword, a base graph (BG) stored in said memory, from which to derive a low density parity check (LDPC) code for use in encoding data bits;

encoding, by an encoder circuit, the data bits to generate the codeword using the LDPC code derived from the selected BG; and

transmitting, by a transceiver circuit, the codeword using the MCS via resources of the RA using one or more antenna elements in electrical communication with the transceiver circuit.

6. The method of claim 5 , wherein selecting the BG comprises selecting the BG from a set of two base graphs.

7. The method of claim 5 , wherein selecting the BG comprises:

determining a coding rate based on the MCS;

calculating a code block size (CBS) based on the coding rate and the RA; and

selecting the BG based on the CBS and the coding rate.

8. The method of claim 7 , wherein selecting the BG further comprises:

selecting a first BG from a set of two base graphs when:

the CBS is less than or equal to 292 bits,

the coding rate is less than or equal to 0.25, or

the CBS is less than or equal to 3824 bits and the coding rate is less than or equal to 0.67; and

selecting the second BG from the set of the two base graphs when the first BG is not selected.

9. The method of claim 5 , further comprising:

obtaining, by the transceiver circuit, an indication that a user equipment (UE) did not receive the codeword;

selecting, by the processor, a second code rate for a retransmission of the bits of the codeword, wherein the selection is from a restricted set of code rates designed to ensure the UE selects a same BG to decode the retransmission; and

retransmitting, by the transceiver circuit using the one or more antenna elements and the processor, the data bits in another codeword according to the selected second code rate.

10. The method of claim 9 , wherein retransmitting the data bits comprises:

selecting, by the processor, a modulation and coding scheme (MCS) and a resource allocation (RA) for the retransmitting, based on the selected second code rate; and

transmitting, by the transceiver circuit, the second codeword using the selected MCS and via resources of the RA using the one or more antenna elements.

11. An apparatus for wireless communications, comprising:

a processor configured to:

cause the apparatus to receive control information indicating a modulation and coding scheme (MCS) and resource allocation (RA) for transmission of a codeword;

select a base graph (BG), from which to derive a low density parity check (LDPC) code for use in decoding the codeword, based on the MCS and the RA;

cause the apparatus to receive the codeword via resources of the RA; and

decode the codeword using the LDPC code derived from the selected BG; and

a memory coupled with the processor.

12. The apparatus of claim 11 , wherein the processor is configured to select the BG by selecting the BG from a set of two base graphs.

13. The apparatus of claim 11 , wherein the processor is configured to select the BG by:

determining a coding rate based on the MCS;

calculating a code block size (CBS) based on the coding rate and the RA; and

selecting the BG based on the CBS and the coding rate.

14. The apparatus of claim 13 , wherein the processor is further configured to select the BG by:

selecting a first BG from a set of two base graphs when:

the CBS is less than or equal to 292 bits,

the coding rate is less than or equal to 0.25, or

the CBS is less than or equal to 3824 bits and the coding rate is less than or equal to 0.67; and

selecting the second BG from the set of the two base graphs when the processor does not select the first BG.

15. An apparatus for wireless communications, comprising:

a processor configured to:

select, based on a modulation and coding scheme (MCS) and a resource allocation (RA) for transmitting a codeword, a base graph (BG) from which to derive a low density parity check (LDPC) code for use in encoding data bits in the codeword;

encode the data bits to generate the codeword using the LDPC code derived from the selected BG; and

cause the apparatus to transmit the codeword using the MCS via resources of the RA; and

a memory coupled with the processor.

16. The apparatus of claim 15 , wherein the processor is configured to select the BG by selecting the BG from a set of two base graphs.

17. The apparatus of claim 15 , wherein the processor is configured to select the BG by:

determining a coding rate based on the MCS;

calculating a code block size (CBS) based on the coding rate and the RA; and

selecting the BG based on the CBS and the coding rate.

18. The apparatus of claim 17 , wherein the processor is further configured to select the BG by:

selecting a first BG from a set of two base graphs when:

the CBS is less than or equal to 292 bits,

the coding rate is less than or equal to 0.25, or

the CBS is less than or equal to 3824 bits and the coding rate is less than or equal to 0.67; and

selecting the second BG from the set of the two base graphs when the first BG is not selected.

19. The apparatus of claim 15 , wherein the processor is further configured to:

obtain an indication that a user equipment (UE) did not receive the codeword;

select a second code rate for a retransmission of the bits of the codeword, wherein the selection is from a restricted set of code rates designed to ensure the UE selects a same BG to decode the retransmission; and

cause the apparatus to retransmit the data bits in another codeword according to the selected second code rate.

20. The apparatus of claim 19 , wherein the processor is configured to cause the apparatus to retransmit the data bits by:

selecting a modulation and coding scheme (MCS) and a resource allocation (RA) for the retransmitting, based on the selected second code rate; and

causing the apparatus to transmit the second codeword using the selected MCS and via resources of the RA.