IP Library Granted Patent US 50,437
Granted Patent E1
US 50,437 · App. 18/676,297 · Granted May 20, 2025

Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code

Inventors: Thomas Joseph Richardson (South Orange, NJ); Joseph Binamira Soriaga (San Diego, CA); Shrinivas Kudekar (Roswell, GA); Gabi Sarkis (San Diego, CA)
Assignee: QUALCOMM Incorporated
H03M13/1168H03M13/1137H03M13/114H03M13/1145H03M13/116H03M13/1185H03M13/616H03M13/618H03M13/6306H03M13/6362H03M13/6393H03M13/6513H03M13/6561H04L1/0047H04L1/0057H04L1/0069H04L5/0007
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Quick Facts
Patent No.
US 50,437
App. No.
18/676,297
Granted
May 20, 2025
Kind
E1
Abstract

Certain aspects of the present disclosure provide low-density parity-check (LDPC) codes having pairwise orthogonality of adjacent rows, and a new decoder that exploits the pairwise row orthogonality for flexible decoder scheduling without performance loss. An apparatus includes a receiver configured to receive a codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal the receiver. The apparatus includes at least one processor coupled with a memory and comprising decoder circuitry configured to decode the codeword based on a LDPC code to produce a set of information bits. The LDPC code is stored in the memory and defined by a base matrix having columns in which all adjacent rows are orthogonal in a last portion of the rows.

Claims (153)

1. An apparatus for wireless communication, the apparatus comprising:

a receiver configured to receive a codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal the receiver; and

at least one processor coupled with a memory and comprising decoder circuitry configured to decode the codeword based on a low density parity check (LDPC) code to produce a set of information bits, wherein:

the LDPC code is based on a base matrix and a lifting factor;

the LDPC code is stored in the memory and defined by a base matrix having a first number of comprises sixty-eight columns corresponding to variable nodes of a base graph indexed by column indices j=0-67 and a second number of forty-six rows corresponding to check nodes of the base graph, and

for each of the first number of columns, all adjacent rows are orthogonal in a last portion of the second number of rows

elements V i,j in the base matrix are represented by the row indices i and the column indices j;

the elements V i,j of the base matrix are non-zero elements for:

j=0, i=26, 28, 30, 32, 34, 36, 38, 40, 42, and 44; and

j=1, i=25, 27, 29, 31, 33, 35, 37, 39, 41, 43, and 45; and

the elements V i,j of the base matrix are zero elements for:

j=0, i=25, 27, 29, 31, 33, 35, 37, 39, 41, 43, and 45; and

j=1, i=26, 28, 30, 32, 34, 36, 38, 40, 42, and 44.

2. The apparatus of claim 1 , wherein entries each element in the base matrix correspond corresponds to an edge between the a variable node and the a check node, of the a base graph, associated with the entry in base matrix.

3. The apparatus of claim 2 , wherein entries each non-zero element in the base matrix include corresponds to a cyclic integer lifting values value.

4. The apparatus of claim 2 , wherein in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry.

5. The apparatus of claim 1 , wherein the last portion of the rows comprises at least the bottom twenty-one rows of the base matrix.

6. The apparatus of claim 1 , wherein the memory is configured to store at least a portion of the LDPC code or base matrix.

7. The apparatus of claim 1 , wherein the at least one processor includes a layered decoder configured to decode the codeword.

8. The apparatus of claim 1 , wherein the at least one processor is configured to decode the codeword based on a decoding schedule.

9. The apparatus of claim 8 , wherein the decoding schedule includes decoding at least one processor is configured to decode the codeword based on the LDPC code by decoding sequentially row by row in the base matrix or by to simultaneously decoding decode pairs of rows in the base matrix based on the decoding schedule.

10. The apparatus of claim 9 , wherein the at least one processor is configured to select from two combinations a combination of two rows from any three sequential rows in the last portion for the simultaneous decoding pairs of the decoding schedule twenty-one rows having the rows indices i=25-45 to simultaneously decode.

11. The apparatus of claim 9 , wherein the row by row or pairs of rows is performed at least one processor is further configured to decode sequentially column by column in the base matrix.

12. The apparatus of claim 8 , wherein the decoding schedule includes skipping at least one processor is further configured to skip decoding portions the zero elements of of the base matrix that, wherein the zero elements do not contain an associated entry in a lifted matrix.

13. The apparatus of claim 1 , wherein the LDPC code comprises a lifted LDPC code.

14. The apparatus of claim 1 , wherein:

the codeword comprises a punctured codeword,; and

the at least one processor further comprises a depuncturer configured to depuncture the codeword, and

the decoding comprises decoding the depunctured codeword.

15. An apparatus for wireless communication, the apparatus comprising:

at least one processor coupled with a memory and comprising an encoder circuit configured to encode a set of information bits based on a low density parity check (LDPC) code to produce a codeword, wherein:

the LDPC code is based on a base matrix and a lifting factor;

the LDPC code is stored in the memory and defined by a base matrix having a first number of comprises sixty-eight columns corresponding to variable nodes of a base graph indexed by column indices j=0-67 and a second number of forty-six rows corresponding to check nodes of the base graph, and

for each of the first number of columns, all adjacent rows are orthogonal in a last portion of the second number of rows indexed by row indices i=0-45;

elements V i,j in the base matrix are represented by the row indices i and the column indices j;

the elements V i,j of the base matrix are non-zero elements for:

j=0, i=26, 28, 30, 32, 34, 36, 38, 40, 42, and 44; and

j=1, i=25, 27, 29, 31, 33, 35, 37, 39, 41, 43, and 45; and

the elements V i,j of the base matrix are zero elements for:

j=0, i=25, 27, 29, 31, 33, 35, 37, 39, 41, 43, and 45; and

j=1, i=26, 28, 30, 32, 34, 36, 38, 40, 42, and 44; and

a transmitter configured to transmit the codeword in accordance with a radio technology across a wireless channel via one or more antenna elements arranged proximal the transmitter.

16. The apparatus of claim 15 , wherein entries each element in the base matrix correspond corresponds to an edge between the a variable node and the a check node, of the a base graph, associated with the entry in base matrix.

17. The apparatus of claim 16 , wherein entries each non-zero element in the base matrix are replaced corresponds to a cyclic integer lifting values value.

18. The apparatus of claim 16 , wherein in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry.

19. The apparatus of claim 15 , wherein the last portion of the rows comprises at least the bottom twenty-one rows of the base matrix.

20. The apparatus of claim 15 , wherein:

the at least one processor is further configured to lifted the LDPC code by generating generate an integer number of copies of the base matrix; and

the LDPC code comprises a lifted LDPC code to lift the LDPC code.

21. The apparatus of claim 15 , wherein:

the at least one processor further comprises a puncturer configured to puncture the codeword,; and

the transmitting the codeword comprises transmitting transmitter is configured to transmit the punctured codeword.

22. A method for wireless communication, the method comprising:

receiving a codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal a receiver; and

decoding the codeword via decoder circuitry based on a low density parity check (LDPC) code to produce a set of information bits, wherein:

the LDPC code is based on a base matrix and a lifting factor;

the LDPC code is stored in the memory and defined by a base matrix having a first number of comprises sixty-eight columns corresponding to variable nodes of a base graph indexed by column indices j=0-67 and a second number of forty-six rows corresponding to check nodes of the base graph, and

for each of the first number of columns, all adjacent rows are orthogonal in a last portion of the second number of rows indexed by row indices i=0-45;

elements V i,j in the base matrix are represented by the row indices i and the column indices i;

the elements V i,j of the base matrix are non-zero elements for:

j=0, i=26, 28, 30, 32, 34, 36, 38, 40, 42, and 44; and

j=1, i=25, 27, 29, 31, 33, 35, 37, 39, 41, 43, and 45; and

the elements V i,j of the base matrix are zero elements for:

j=0, i=25, 27, 29, 31, 33, 35, 37, 39, 41, 43, and 45; and

j=1, i=26, 28, 30, 32, 34, 36, 38, 40, 42, and 44.

23. The method of claim 22 , wherein in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry.

24. The method of claim 22 , wherein the last portion of the rows comprises at least the bottom twenty-one rows of the base matrix.

25. The method of claim 22 , wherein:

the decoding is based on a decoding schedule; and

the decoding schedule the codeword includes decoding the codeword based on the LDPC code by decoding sequentially row by row in the base matrix or by simultaneously decoding pairs of rows in the base matrix based on a decoding schedule.

26. The method of claim 25 , further comprising selecting from two combinations of two each pair of the pairs of rows from any three sequential rows in of the last portion for the simultaneous decoding pairs of the decoding schedule twenty-one rows i=25-45 to decode.

27. A method for wireless communication, the method comprising:

encoding a set of information bits with encoder circuitry based on a low density parity check (LDPC) code to produce a codeword wherein:

the LDPC code is based on a base matrix and a lifting factor;

the LDPC code is stored in the memory and defined by a base matrix having a first number of comprises sixty-eight columns corresponding to variable nodes of a base graph indexed by column indices j=0-67 and a second number of forty-six rows corresponding to check nodes of the base graph, and

for each of the first number of columns, all adjacent rows are orthogonal in a last portion of the second number of rows indexed by row indices i=0-45;

elements V i,j in the base matrix are represented by the row indices i and the column indices j;

the elements V i,j of the base matrix are non-zero elements for:

j=0, i=26, 28, 30, 32, 34, 36, 38, 40, 42, and 44; and

j=1, i=25, 27, 29, 31, 33, 35, 37, 39, 41, 43, and 45; and

the elements V i,j of the base matrix are zero elements for:

j=0, i=25, 27, 29, 31, 33, 35, 37, 39, 41, 43, and 45; and

j=1, i=26, 28, 30, 32, 34, 36, 38, 40, 42, and 44; and

transmitting the codeword in accordance with a radio technology across a wireless channel via one or more antenna elements.

28. The method of claim 27 , wherein in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry.

29. The method of claim 27 , wherein the last portion of the rows comprises at least the bottom twenty-one rows of the base matrix.

30. The method of claim 27 , further comprising puncturing the codeword, wherein transmitting the codeword comprises transmitting the punctured codeword.

31. The apparatus of claim 1 , wherein:

elements V i,j of the base matrix are non-zero elements further for:

i=25, j=6, 7, 14, and 47;

i=26, j=2, 4, 15, and 48;

i=27, j=6, 8, and 49;

i=28, j=4, 19, 21, and 50;

i=29, j=14, 18, 25, and 51;

i=30, j=10, 13, 24, and 52;

i=31, j=7, 22, 25, and 53;

i=32, j=12, 14, 24, and 54;

i=33, j=2, 11, 21, and 55;

i=34, j=7, 15, 17, and 56;

i=35, j=6, 12, 22, and 57;

i=36, j=14, 15, 18, and 58;

i=37, j=13, 23, and 59;

i=38, j=9, 10, 12, and 60;

i=39, j=3, 7, 19, and 61;

i=40, j=8, 17, and 62;

i=41, j=3, 9, 18, and 63;

i=42, j=4, 24, and 64;

i=43, j=16, 18, 25, and 65;

i=44, j=7, 9, 22, and 66; and

i=45, j=1, 6, 10, and 67; and

remaining elements V i,j in the rows 25-45 are zero elements.

32. The apparatus of claim 1 , wherein:

the at least one processor is configured to select pairs of rows from any three sequential rows in the last twenty-one rows having the row index having the row indices i=25-45; and

the at least one processor comprises decoder circuitry configured to simultaneously decode each pair of rows.

33. The apparatus of claim 1 , wherein the first column having the column index j=0 and the second column having the column index j=1 have a highest degree among the sixty-eight columns.

34. The apparatus of claim 33 , wherein the first column having the column index j=0 the second column having the column index j=1 have a highest number of non-zero entries among the sixty-eight columns.

35. The apparatus of claim 34 , wherein:

the codeword comprises a punctured codeword; and

the at least one processor comprises a depuncturer configured to depuncture systematic bits corresponding to the first column having the column index j=0 and the second column having the column index j=1.

36. The apparatus of claim 1 , wherein the receiver is configured to receive the codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal the receiver.

37. The apparatus of claim 15 , wherein:

elements V i,j of the base matrix are non-zero elements further for:

i=25, j=6, 7, 14, and 47;

i=26, j=2, 4, 15, and 48;

i=27, j=6, 8, and 49;

i=28, j=4, 19, 21, and 50;

i=29, j=14, 18, 25, and 51;

i=30, j=10, 13, 24, and 52;

i=31, j=7, 22, 25, and 53;

i=32, j=12, 14, 24, and 54;

i=33, j=2, 11, 21, and 55;

i=34, j=7, 15, 17, and 56;

i=35, j=6, 12, 22, and 57;

i=36, j=14, 15, 18, and 58;

i=37, j=13, 23, and 59;

i=38, j=9, 10, 12, and 60;

i=39, j=3, 7, 19, and 61;

i=40, j=8, 17, and 62;

i=41, j=3, 9, 18, and 63;

i=42, j=4, 24, and 64;

i=43, j=16, 18, 25, and 65;

i=44, j=7, 9, 22, and 66; and

i=45, j=1, 6, 10, and 67; and

remaining elements V i,j in the rows having the row indices i=25-45 are zero elements.

38. The apparatus of claim 15 , wherein:

the at least one processor is configured to select pairs of rows from any three sequential rows in the last twenty-one rows having the row indices i=25-45; and

the at least one processor comprises encoder circuitry configured to simultaneously encode each pair of rows.

39. The apparatus of claim 15 , wherein the first column having the column index j=0 and the second column having the column index j=1 have a highest degree among the sixty-eight columns.

40. The apparatus of claim 39 , wherein the first column having the column index j=0 and the second column having the column index j=1 have a highest number of non-zero entries among the sixty-eight columns.

41. The apparatus of claim 39 , wherein:

the code word comprises a punctured codeword; and

the at least one processor comprises a puncturer configured to puncture systematic bits in the codeword corresponding to the first column having the column index j=0 and the second column having the column index j=1.

42. The apparatus of claim 15 , wherein the transmitter is configured to transmit the codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal the transmitter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2024
From: RICHARDSON, THOMAS; SORIAGA, JOSEPH BINAMIRA; KUDEKAR, SHRINIVAS; SARKIS, GABI
To: QUALCOMM INCORPORATED
Reel/Frame 068053/0698 →
Continuity (5)
Continuation 17334608 · May 28, 2021
Reissue 16003047 · Jun 7, 2018
Provisional Application 62517916 · Jun 10, 2017
Provisional Application 62522044 · Jun 19, 2017
Reissue 16003047 · Jun 7, 2018
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