IP Library Granted Patent US 8,352,846
Granted Patent B2
US 8,352,846 · App. 12/437,545 · Granted Jan 8, 2013

Method an apparatus for low density parity check codes encoding and decoding

Assignee: Adeptence, LLC
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Quick Facts
Patent No.
US 8,352,846
App. No.
12/437,545
Granted
Jan 8, 2013
Kind
B2
Abstract

Provided is a method for generating a single rate or multi-rate highly structured low density parity check, encoding a data stream with the generated LDPC matrix for transmission in a wireless communication system, and for efficient LDPC decoding at a receiver.

Claims (36)

1. A method for communication, comprising:

generating at least one block matrix having a cyclic sub-block shift registers representation comprising a set of memory components coupled to a set of fixed permuters;

combining rows of the at least one block matrix into sub-block rows of at least one high-rate block matrix; and

generating at least one low density parity check matrix from the at least one high-rate block matrix.

2. The method of claim 1 , wherein generating the at least one block matrix further comprises permuting rows of the at least one block matrix.

3. The method of claim 1 , further comprising encoding at least a portion of a data stream with the low density parity check matrix.

4. The method of claim 3 , wherein encoding comprises employing at least one cyclic sub-block shift register.

5. The method of claim 1 , further comprising shuffling the sub-block rows before generating the at least one low density parity check matrix.

6. The method of claim 1 , further comprising cyclic shifting the sub-block rows before generating the at least one low density parity check matrix.

7. The method of claim 1 , further comprising masking entries of the sub-block rows before generating the at least one low density parity check matrix.

8. The method of claim 1 , further comprising deleting one or more of the sub-block rows before generating the at least one low density parity check matrix.

9. The method of claim 1 , wherein the at least one block matrix comprises element matrices, the element matrices being selected from a set of cyclic shifted identity matrices and a zero matrix.

10. The method of claim 1 , wherein the at least one block matrix comprises element matrices, the element matrices being selected from a set of permutation matrices and a zero matrix.

11. An apparatus for communication, comprising:

a block matrix generator for generating a block matrix;

a set of adders for adding rows of the block matrix to produce sub-block rows of at least one higher-rate block matrix; and

a low density parity check matrix generator for generating at least one low density parity check matrix from the at least one higher-rate block matrix.

12. The apparatus of claim 11 , further comprising a set of permuters for permuting rows of the at least one block matrix.

13. The apparatus of claim 11 , further comprising an encoder for encoding at least a portion of a data stream with the low density parity check matrix.

14. The apparatus of claim 13 , wherein the encoder comprises employing at least one cyclic sub-block shift register.

15. The apparatus of claim 11 , further comprising a shuffler for shuffling the sub-block rows.

16. The apparatus of claim 11 , further comprising a cyclic shifter for cyclic shifting the sub-block rows.

17. The apparatus of claim 11 , further comprising a mask for masking entries of the sub-block rows.

18. The apparatus of claim 11 , further comprising a matrix processor for deleting one or more of the sub-block rows.

19. A non-transitory machine-readable medium comprising instructions encoded thereon and executable to:

generate at least one block matrix having a cyclic sub-block shift registers representation;

combine rows of the at least one block matrix into sub-block rows of at least one high-rate block matrix; and

generate at least one low density parity check matrix from the at least one high-rate block matrix.

20. The machine-readable medium of claim 19 , further comprising instructions encoded thereon and executable to permute the rows of the at least one block matrix.

21. The machine-readable medium of claim 19 , further comprising instructions encoded thereon and executable to encode at least a portion of a data stream with the low density parity check matrix.

22. The machine-readable medium of claim 19 , further comprising instructions encoded thereon and executable to shuffle the sub-block rows.

23. The machine-readable medium of claim 19 , further comprising instructions encoded thereon and executable to cyclic shift the sub-block rows.

24. The machine-readable medium of claim 19 , further comprising instructions encoded thereon and executable to mask entries of the sub-block rows.

25. The machine-readable medium of claim 19 , further comprising instructions encoded thereon and executable to delete one or more of the sub-block rows.

26. The machine-readable medium of claim 19 , wherein the at least one block matrix comprises element matrices, the element matrices being selected from a set of cyclic shifted identity matrices and a zero matrix.

27. The machine-readable medium of claim 19 , wherein the at least one block matrix comprises element matrices, the element matrices being selected from a set of permutation matrices and a zero matrix.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2015
From: ADEPTENCE, LLC
To: NANT HOLDINGS IP, LLC
Reel/Frame 035559/0156 →
CHANGE OF NAME Recorded Sep 11, 2012
From: HIPO, LLC
To: ADEPTENCE, LLC
Reel/Frame 028939/0107 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2012
From: TENSORCOM, INC.
To: HIPO, LLC
Reel/Frame 028183/0706 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2010
From: LAKKIS, ISMAIL
To: TENSORCOM, INC.
Reel/Frame 024355/0152 →
Continuity (1)
Related Publication 20100287438A1 · Nov 11, 2010