IP Library Granted Patent US 10,802,367
Granted Patent B2
US 10,802,367 · App. 16/026,970 · Granted Oct 13, 2020

Display device

Inventor: Ji Hun Choi (Daejeon, KR)
Assignee: Electronics and Telecommunications Research Institute
G02F1/136286G02F1/1368G02F1/13439G02F1/133553G02F1/134336G02F1/136209H01L27/124H01L27/1218G02F2001/133357G02F2201/121G02F2201/40G09G3/3681G09G3/3688
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Quick Facts
Patent No.
US 10,802,367
App. No.
16/026,970
Granted
Oct 13, 2020
Kind
B2
Abstract

Provided is a display device. The display device includes a data line extending in a first direction, a reflective electrode on the data line, and a transistor formed between the data line and the reflective electrode. The transistor includes a first electrode connected to the data line, a second electrode spaced apart from the first electrode in the first direction and connected to the reflective electrode, and a semiconductor layer connecting the first electrode and the second electrode.

Claims (38)

1. A display device comprising:

a data line extending in a first direction;

a gate line extending in a second direction intersecting the first direction;

a reflective electrode on the data line; and

a transistor formed between the data line and the reflective electrode,

wherein the transistor comprises:

a first electrode connected to the data line;

a second electrode spaced apart from the first electrode in the first direction and connected to the reflective electrode; and

a semiconductor layer connecting the first electrode and the second electrode,

wherein the first electrode and the second electrode are positioned at a higher level than the data line and vertically overlap the data line, and in a plan view, are within a width of the data line in the second direction, and

wherein the semiconductor layer is disposed on an intersection point of the data line and the gate line.

2. The display device of claim 1 , wherein the semiconductor layer is vertically overlapped with the data line and the reflective electrode.

3. The display device of claim 1 ,

wherein a portion of the gate line is located between the semiconductor layer and the data line.

4. The display device of claim 1 ,

wherein

the reflective electrode extends in the first direction, and

the reflective electrode intersects the gate line, the reflective electrode being insulated from the gate line.

5. The display device of claim 1 , further comprising a planarization film covering the transistor and having a flat upper surface,

wherein the reflective electrode is located on the planarization film.

6. The display device of claim 1 , wherein a width of the reflective electrode is equal to a width of the data line.

7. The display device of claim 1 , further comprising:

a common electrode on the reflective electrode; and

a liquid crystal layer between the reflective electrode and the common electrode.

8. The display device of claim 1 ,

wherein a width in the first direction of the gate line is greater than a width in the second direction of the data line.

9. The display device of claim 1 , further comprising:

a shielding pattern between the gate line and the data line.

10. The display device of claim 1 , further comprising a contact plug disposed between the first electrode and the data line, wherein the contact plug connects the first electrode and the data line electrically.

11. The display device of claim 1 , wherein the data line has a zigzag shape.

12. The display device of claim 1 , wherein the data line comprises:

a first portion extending in the first direction and at least partially overlapping the first electrode;

a second portion extending in the first direction and spaced apart from the first portion in the first direction and the second direction, the second direction being perpendicular to the first direction; and

a connection portion connecting the first portion and the second portion.

13. The display device of claim 12 , wherein the second portion is spaced apart from the second electrode in the second direction.

14. The display device of claim 12 , wherein the second portion is spaced apart from the semiconductor layer in the second direction.

15. The display device of claim 12 ,

wherein the gate line is spaced apart from the first portion in the first direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2018
From: CHOI, JI HUN
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 046489/0341 →
Priority Claims (2)
KR 10-2017-0085596 · Jul 5, 2017 · national
KR 10-2018-0062993 · May 31, 2018 · national
Continuity (1)
Related Publication 20190011791A1 · Jan 10, 2019
Cited By (1)
US 12,261,177