Apparatuses and methods for providing power for memory refresh operations

1. An apparatus, comprising:

refresh circuits configured to refresh memory cells of a memory bank;

a power amplifier configured to provide power when activated to the refresh circuits, the power provided by the power amplifier having a first voltage;

a power circuit configured to receive a power supply voltage and further configured to provide power when activated to the refresh circuits, the power provided by the power circuit having a second voltage; and

a power control circuit configured to receive a target voltage, the first voltage, and a refresh activation signal, the power control circuit configured to compare the first voltage and the target voltage and further configured to provide an activation signal to control activation of the power circuit having an active duration based at least in part on the comparison, wherein the power control circuit comprises:

a control circuit configured to receive the refresh activation signal, and configured to provide a second control signal that is active responsive to the refresh activation signal being active and provide an evaluation signal that is active responsive to the refresh activation signal being inactive;

a comparator circuit configured to receive the evaluation signal, and to receive the target voltage and the first voltage, the comparator circuit configured to compare the target with the first voltage responsive to the active evaluation signal and provide a first duration control signal and a second duration control signal based on the comparison; and

a timer circuit configured to receive the second control signal, the first duration control signal, and the second duration control signal, the timer circuit further configured to provide the activation signal having an active duration based on the first and second duration control signals.

2. The apparatus of claim 1 wherein the power provided by the power amplifier is based on the power supply voltage.

3. The apparatus of claim 1 wherein the target voltage is equal to a target first voltage for the power amplifier.

4. The apparatus of claim 1 wherein the power circuit comprises a p-type transistor and an inverter configured to receive the activation signal from the power control circuit.

5. The apparatus of claim 1 wherein the power control circuit is configured to provide the activation signal to activate the power circuit after the power amplifier is activated and to deactivate the power circuit before the power amplifier is deactivated.

6. The apparatus of claim 1 wherein the power control circuit is configured to increase duration of the activation signal being active responsive to the first voltage being less than the target voltage and to decrease duration of the activation signal being active responsive to the first voltage being greater than the target voltage.

7. An apparatus, comprising:

refresh circuits configured to refresh memory cells of a memory bank;

a power amplifier configured to provide power when activated to the refresh circuits, the power provided by the power amplifier having a first voltage;

a power circuit configured to receive a power supply voltage and further configured to provide power when activated to the refresh circuits, the power provided by the power circuit having a second voltage; and

a power control circuit configured to receive a target voltage, the first voltage, and a refresh activation signal, the power control circuit configured to compare the first voltage and the target voltage and further configured to provide an activation signal to control activation of the power circuit having an active duration based at least in part on the comparison, wherein the power control circuit is configured to increase duration of the activation signal being active responsive to the first voltage being less than the target voltage and to decrease duration of the activation signal being active responsive to the first voltage being greater than the target voltage, wherein the power control circuit is further configured to maintain active duration of the activation signal responsive to the first voltage equal to the target voltage.

8. A method, comprising:

providing power to refresh circuits during refresh operation; and

supplementing the power provided to the refresh circuits with power from an external power supply voltage,

wherein the power is supplemented for an activation duration that is based on a comparison of a voltage of the power provided to the refresh circuits and a target voltage, wherein the activation duration is increased responsive to the voltage of the power provided to the refresh circuits being less than the target voltage when compared, wherein the activation duration is decreased responsive to the voltage of the power provided to the refresh circuits being greater than the target voltage when compared, and wherein the activation duration is maintained responsive to the voltage of the power provided to the refresh circuits being equal to the target voltage when compared.

9. The method of claim 8 wherein supplementing the power provided to the refresh circuits comprises coupling the refresh circuits to the external power supply.

10. The method of claim 8 wherein the activation duration is increased by incrementing a timer circuit and wherein the activation duration is decreased by decrementing the timer circuit.

11. The method of claim 8 wherein the power provided to the refresh circuits is provided for a plurality of periods of time during the refresh operation and wherein the voltage of the power provided to the refresh circuits and the target voltage are compared at an end of the period of time for at least one of the plurality of periods of time.