Array substrate, display panel, display apparatus, and method for manufacturing array substrate

1. An array substrate, comprising a base-substrate and a plurality of circuit structures disposed on a side of the base-substrate;

wherein the plurality of circuit structures comprises a pixel driving circuit located in a display region and a peripheral driving circuit surrounding the display region;

the plurality of circuit structures comprises a plurality of thin film transistors comprising a first type of thin film transistor and a second type of thin film transistor, and each of the plurality of thin film transistors comprises a gate electrode, a gate insulation layer, an active layer of an oxide semiconductor comprising at least one sub-layer, and a source-drain electrode stacked in a direction perpendicular to the base-substrate;

the active layer of the first type of thin film transistor has more sub-layers than that of the active layer of the second type of thin film transistor, a total thickness of the active layer of the first type of thin film transistor is larger than a total thickness of the active layer of the second type of thin film transistor, and each sub-layer of the active layer of the second type of thin film transistor is in a same layer as the active layer of the first type of thin film transistor;

the first type of thin film transistor is electrically connected into the pixel driving circuit, and is configured to output a driving signal for controlling brightness of a display device; and

the second type of thin film transistor is electrically connected into the peripheral driving circuit, and is configured to output a scanning signal.

2. The array substrate according to claim 1 , wherein

the first type of thin film transistor is directly electrically connected to a display device in the pixel driving circuit; and

the second type of thin film transistor is directly electrically connected to an output of the peripheral driving circuit.

3. The array substrate according to claim 2 , further comprising a first active layer and a second active layer that are stacked in a direction perpendicular to the base-substrate; wherein

the active layer of the first type of thin film transistor is a double-layer structure, which is in a same layer as the first active layer and the second active layer; and

the active layer of the second type of thin film transistor is a single-layer structure, which is in a same layer as the second active layer.

4. The array substrate according to claim 1 , wherein

the active layer of the first type of thin film transistor is divided into a first part and a second part, wherein the first part is in a same layer as the active layer of the second type of thin film transistor, and the second part is in different layers from the active layer of the second type of thin film transistor, and that the first part is located on a side of the second part facing away from the base-substrate.

5. The array substrate according to claim 1 , further comprising a first active layer and a second active layer that are stacked in a direction perpendicular to the base-substrate; wherein

the active layer of the first type of thin film transistor is a double-layer structure, which is in a same layer as the first active layer and the second active layer, respectively; and

the active layer of the second type of thin film transistor is a single-layer structure, which is in a same layer as the second active layer.

6. The array substrate according to claim 5 , wherein

in the first type of thin film transistor, an orthographic projection of the second active layer on the base-substrate covers an orthographic projection of the first active layer on the base-sub state.

7. The array substrate according to claim 5 , wherein

each active layer of the first type of thin film transistor comprises a channel region and a source-drain contact region located at both ends of the channel region; an orthographic projection of the first active layer on the channel region is consistent with an orthographic projection of the second active layer on the channel region.

8. The array substrate according to claim 5 , wherein

a thickness of the first active layer is smaller than a thickness of the second active layer.

9. The array substrate according to claim 5 , wherein

a thickness of the second active layer ranges from 300 Å to 500 Å.

10. The array substrate according to claim 9 , wherein

the thickness of the second active layer is 400 Å.

11. The array substrate according to claim 9 , wherein

a thickness of the first active layer ranges from 50 Å to 200 Å.

12. The array substrate according to claim 1 , wherein

a difference between the total thickness of the active layer of the first type of thin film transistor and the total thickness of the active layer of the second type of thin film transistor ranges from 10 Å to 500 Å.

13. The array substrate according to claim 1 , wherein

a gate electrode of the first type of thin film transistor is in a same layer as a gate electrode of the second type of thin film transistor;

a gate insulation layer of the first type of thin film transistor is in a same layer as a gate insulation layer of the second type of thin film transistor;

a source-drain electrode of the first type of thin film transistor is in a same layer as a source-drain electrode of the second type of thin film transistor.

14. The array substrate according to claim 1 , wherein

positions at which the plurality of thin film transistors is located in the plurality of circuit structures comprise a first position, during working of the plurality of circuit structures, one of the plurality of thin film transistors located at the first position is in a positive bias state for a longer time than being in a negative bias state, and the one of the plurality of thin film transistors located at the first position is the first type of thin film transistor.

15. The array substrate according to claim 1 , wherein

positions at which the plurality of thin film transistors is located in the plurality of circuit structures further comprise a second position, during working of the plurality of circuit structures, one of the plurality of thin film transistors located at the second position has a voltage difference between its gate electrode and its source electrode, which is zero for a longer time than being positive, and the one of the plurality of thin film transistors located at the second position is the second type of thin film transistor.

16. The array substrate according to claim 1 , wherein

positions at which the plurality of thin film transistors is located in the plurality of circuit structures further comprise a third position, during working of the plurality of circuit structures, one of the plurality of thin film transistors located at the third position is used to provide a signal to a device that needs to respond to a precise signal, and the one of the plurality of thin film transistors located at the third position is the first type of thin film transistor.

17. A display panel, comprising an array substrate and a display function layer, wherein the array substrate comprises a base-substrate and a plurality of circuit structures disposed on a side of the base-substrate;

wherein the plurality of circuit structures comprises a pixel driving circuit located in a display region and a peripheral driving circuit surrounding the display region;

the plurality of circuit structures comprises a plurality of thin film transistors comprising a first type of thin film transistor and a second type of thin film transistor, and each of the plurality of thin film transistors comprises a gate electrode, a gate insulation layer, an active layer of an oxide semiconductor comprising at least one sub-layer, and a source-drain electrode stacked in a direction perpendicular to the base-substrate;

the active layer of the first type of thin film transistor has more sub-layers than that of the active layer of the second type of thin film transistor, a total thickness of the active layer of the first type of thin film transistor is larger than a total thickness of the active layer of the second type of thin film transistor, and each sub-layer of the active layer of the second type of thin film transistor is in a same layer as the active layer of the first type of thin film transistor;

the first type of thin film transistor is electrically connected into the pixel driving circuit, and is configured to output a driving signal for controlling brightness of a display device; and

the second type of thin film transistor is electrically connected into the peripheral driving circuit, and is configured to output a scanning signal,

the display function layer is disposed on a side of the array substrate away from the base-sub state.

18. A display apparatus, comprising a display panel, wherein the display panel comprises an array substrate and a display function layer, wherein the array substrate comprises base-substrate and a plurality of circuit structures disposed on a side of the base-substrate;

wherein the plurality of circuit structures comprises a pixel driving circuit located in a display region and a peripheral driving circuit surrounding the display region;

the plurality of circuit structures comprises a plurality of thin film transistors comprising a first type of thin film transistor and a second type of thin film transistor, and each of the plurality of thin film transistors comprises a gate electrode, a gate insulation layer, an active layer of an oxide semiconductor comprising at least one sub-layer, and a source-drain electrode stacked in a direction perpendicular to the base-substrate;

the active layer of the first type of thin film transistor has more sub-layers than that of the active layer of the second type of thin film transistor, a total thickness of the active layer of the first type of thin film transistor is larger than a total thickness of the active layer of the second type of thin film transistor, and each sub-layer of the active layer of the second type of thin film transistor is in a same layer as the active layer of the first type of thin film transistor;

the first type of thin film transistor is electrically connected into the pixel driving circuit, and is configured to output a driving signal for controlling brightness of a display device; and

the second type of thin film transistor is electrically connected into the peripheral driving circuit, and is configured to output a scanning signal,

the display function layer is disposed on a side of the array substrate away from the base-sub state.

19. A method for manufacturing an array substrate, comprising:

forming, on a side of a base-substrate, a gate electrode, a gate insulation layer, an active layer of an oxide semiconductor and a source-drain electrode for a first type of thin film transistor and a second type of thin film transistor, respectively;

wherein the active layer of the first type of thin film transistor has more sub-layers than that of the active layer of the second type of thin film transistor, a total thickness of the active layer of the first type of thin film transistor is larger than a total thickness of the active layer of the second type of thin film transistor, and each sub-layer of the active layer of the second type of thin film transistor is in a same layer as the active layer of the first type of thin film transistor,

wherein forming the active layer of the first type of thin film transistor and the second type of thin film transistor further comprises:

forming a first active layer on the side of the base-substrate, and patterning the first active layer to form a part of the active layer of the first type of thin film transistor; and

forming a second active layer on a side of the first active layer away from the base-substrate, and patterning the second active layer to form the active layer of the second type of thin film transistor and another part of the active layer of the first type of thin film transistor.

20. The method according to claim 19 , comprising:

forming a first metal layer on the base-substrate and patterning the first metal layer to form a gate electrode of the first type of thin film transistor and a gate electrode of the second type of thin film transistor;

forming, on a side of the first metal layer away from the base-substrate, a gate insulation layer covering the first type of thin film transistor and the second type of thin film transistor; and

forming, on a side of the gate insulation layer away from the base-substrate, the active layer of the first type of thin film transistor and the active layer of the second type of thin film transistor.