Vertical transistor pass gate device

1. A semiconductor device comprising:

a first source/drain region having a first epitaxial material with a diamond shaped geometry is present at a first end of a fin structure, the fin structure being present on a substrate;

a second source/drain region having a second epitaxial material with said diamond shaped geometry that is present at the second end of the fin structure; and

a gate structure present on a fin channel region portion of the fin structure between the first source/drain region and the second source/drain region, wherein the first source/drain region, the fin channel region, and second source/drain region are arranged perpendicular to the plane of an upper surface of the substrate.

2. The semiconductor device of claim 1 , wherein the first source/drain region is a source region, and the second source/drain region is a drain region.

3. The semiconductor device of claim 1 , wherein a size for the first epitaxial material with the diamond geometry is substantially equal to a size for the second epitaxial material with the diamond geometry.

4. The semiconductor device of claim 1 , wherein a composition for the first epitaxial material with the diamond geometry is substantially equal to a composition for the second epitaxial material with the diamond geometry.

5. The semiconductor device of claim 1 , wherein a dopant concentration that dictates a conductivity type of the first epitaxial material with the diamond geometry is substantially equal to dopant concentration that dictates a conductivity type of the second epitaxial material with the diamond geometry.

6. The semiconductor device of claim 1 , wherein the gate structure includes a gate dielectric present on the channel region.

7. The semiconductor device of claim 6 , wherein the gate dielectric is a high-k material.

8. The semiconductor device of claim 7 , wherein a gate conductor is present on the gate dielectric.

9. The semiconductor device of claim 8 , wherein the gate conductor comprises a work function adjusting material.

10. The semiconductor device of claim 9 , wherein the semiconductor device is a vertically orientated pass gate transistor.

11. A semiconductor device comprising:

a fin structure present on a supporting substrate;

a first source/drain region having a first epitaxial material with a diamond shaped geometry is present at first end of the fin structure that is present on the supporting substrate;

a second source/drain region having a second epitaxial material with said diamond shaped geometry that is present at the second end of the fin structure; and

a gate structure present around a vertically orientated channel region, the gate structure includes a gate dielectric present on the channel region, wherein a size for the first epitaxial material with the diamond geometry is substantially equal to a size for the second epitaxial material with the diamond geometry.

12. The semiconductor device of claim 11 , wherein the semiconductor device is a vertically orientated pass gate transistor.

13. The semiconductor device of claim 11 , wherein the first source/drain region is a source region, and the second source/drain region is a drain region.

14. The semiconductor device of claim 11 , wherein a composition for the first epitaxial material with the diamond geometry is substantially equal to a composition for the second epitaxial material with the diamond geometry.

15. The semiconductor device of claim 11 , wherein a dopant concentration that dictates a conductivity type of the first epitaxial material with the diamond geometry is substantially equal to dopant concentration that dictates a conductivity type of the second epitaxial material with the diamond geometry.

16. The semiconductor device of claim 11 , wherein the gate dielectric is a high-k material.

17. The semiconductor device of claim 16 , wherein a gate conductor is present on the gate dielectric.