SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
In a semiconductor device, an epitaxial substrate includes a SiC (silicon carbide) substrate and a GaN (gallium nitride) epitaxial layer formed on the SiC substrate. A multi-layer wiring structure is formed on the front-face side of the epitaxial substrate, and includes at least one metal wiring layer and an organic interlayer dielectric. A back-face metal layer is formed on the back face of the epitaxial substrate. At least one via hole is formed in the epitaxial substrate, and is configured to provide a connection between the multi-layer wiring structure and the back-face metal layer.
1 . A semiconductor device comprising:
an epitaxial substrate comprising a SiC (silicon carbide) substrate and a GaN (gallium nitride) epitaxial layer formed on the SiC substrate;
a multi-layer wiring structure formed on a front-face side of the epitaxial substrate, and comprising at least one metal wiring layer and an organic interlayer dielectric;
a back-face metal layer formed on a back face of the epitaxial substrate; and
at least one via hole formed in the epitaxial substrate, and structured to provide a connection between the multi-layer wiring structure and the back-face metal layer.
2 . The semiconductor device according to claim 1 , wherein via hole etching for forming the via hole is performed under a condition that does not involve degradation of the interlayer dielectric.
3 . The semiconductor device according to claim 1 , wherein an etching rate is set to 1 μm/min or less.
4 . The semiconductor device according to claim 1 , wherein a cooling temperature applied to the epitaxial substrate is 0° C. or less in etching.
5 . The semiconductor device according to claim 1 , wherein, after via hole etching, impurities that have adhered to the epitaxial substrate are removed by ultrasonic cleaning.
6 . The semiconductor device according to claim 5 , wherein the ultrasonic cleaning is performed in pure water.
7 . A manufacturing method for a semiconductor device, comprising:
forming a transistor element on an epitaxial substrate comprising a SiC (silicon carbide) substrate and a GaN (gallium nitride) epitaxial layer formed on the SiC substrate;
forming a multi-layer wiring structure comprising at least one metal wiring layer and an organic interlayer dielectric on a front side of the epitaxial substrate;
grinding a back face of the epitaxial substrate;
performing via hole etching for a back-face side of the epitaxial substrate under a condition that does not involve degradation of the organic interlayer dielectric; and
plating the back face of the epitaxial substrate and a side wall of a via hole.
8 . The manufacturing method according to claim 7 , further comprising removing, by means of ultrasonic cleaning, impurities that have adhered to the epitaxial substrate.