Flip chip self-alignment features for substrate and leadframe applications
Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
1. A method of manufacturing an electronic device, the method comprising:
placing a plurality of bumps of a semiconductor die on a top side of a plurality of bond fingers of a metal leadframe, wherein:
each of the plurality of bumps comprises a metal pillar and a solder cap;
each of at least two of the plurality of bond fingers comprises one or more curved sidewall recessed self-alignment features; and
each of the curved sidewall recessed self-alignment features comprises a maximum width at a top end positioned toward the semiconductor die and a minimum width at a bottom end positioned away from the semiconductor die; and
performing a reflow process, thereby melting the solder caps of the bumps such that at least one of the bumps is pulled into a respective one of the curved sidewall recessed self-alignment features to align the bumps to the bond fingers,
wherein:
a width of the bumps prior to said reflow process is no greater than a maximum width of the curved sidewall recessed self-alignment features,
the plurality of bond fingers comprise a first bond finger and a second bond finger; and
in a top-down view:
at least one of said one or more recessed self-alignment features of the first bond finger is longer in a first direction than in a second direction; and
at least one of said one or more recessed self-alignment features of the second bond finger is longer in the second direction than in the first direction.
2. The method of claim 1 , wherein the reflow process comprises a mass reflow process.
3. The method of claim 1 , comprising roughing a surface of at least one of the curved sidewall recessed self-alignment features at a location to be soldered.
4. The method of claim 1 , comprising, prior to said performing the reflow process:
forming a solder paste in each of the curved sidewall recessed self-alignment features; and
placing the bumps of the semiconductor die in contact with the formed solder paste.
5. The method of claim 1 , wherein, in the top-down view, each of the curved sidewall recessed self-alignment features is elliptical-shaped.
6. The method of claim 1 , wherein each of at least two of the plurality of bond fingers comprises a plurality of respective curved sidewall recessed self-alignment features.
7. An electronic device comprising:
a metal leadframe comprising a plurality of bond fingers, wherein:
each of at least two of the plurality of bond fingers comprises one or more respective curved sidewall recessed self-alignment features;
each of the curved sidewall recessed self-alignment features comprises a maximum width at a top end and a minimum width at a bottom end;
the at least two of the plurality of bond fingers comprise a first bond finger and a second bond finger; and
in a top-down view:
at least one of said one or more respective recessed self-alignment features of the first bond finger is longer in a first direction than in a second direction; and
at least one of said one or more respective recessed self-alignment features of the second bond finger is longer in the second direction than in the first direction; and
a semiconductor die bonded to a top side of the metal leadframe and comprising a plurality of bumps, wherein:
each of the bumps comprises a metal pillar; and
each of the bumps is soldered to a respective one of the curved sidewall recessed self-alignment features.
8. The electronic device of claim 7 , wherein said each of the bumps is mass-reflow soldered to a respective one of the curved sidewall recessed self-alignment features.
9. The electronic device of claim 7 , wherein a surface of at least one of the curved recessed self-alignment features is roughened at a location to be soldered.
10. The electronic device of claim 7 , wherein each of the bumps comprises a respective solder cap and is soldered to its respective one of the curved sidewall recessed self-alignment features utilizing more solder than included in the respective solder cap.
11. The electronic device of claim 7 , wherein, in the top-down view, each of the curved sidewall recessed self-alignment features is elliptical-shaped.
12. The electronic device of claim 7 , wherein at least one of the plurality of bond fingers comprises a plurality of respective curved sidewall recessed self-alignment features.
13. An electronic device comprising:
a metal leadframe comprising a plurality of bond fingers, wherein:
each of at least two of the plurality of bond fingers comprises one or more respective curved sidewall recessed self-alignment features with no flat surfaces;
each of the curved sidewall recessed self-alignment features is elliptical-shaped in a top-down view;
the at least two of the plurality of bond fingers comprise a first bond finger and a second bond finger; and
in the top-down view:
at least one of said one or more respective recessed self-alignment features of the first bond finger is longer in a first direction than in a second direction; and
at least one of said one or more respective recessed self-alignment features of the second bond finger is longer in the second direction than in the first direction; and
a semiconductor die bonded to a top side of the metal leadframe and comprising a plurality of bumps, wherein:
each of the bumps comprises a metal pillar;
each of the bumps is soldered to a respective one of the curved sidewall recessed self-alignment features; and
each of the bumps comprises a maximum width that is no greater than a width of its respective one of the curved sidewall recessed self-alignment features.
14. The electronic device of claim 13 , wherein said each of the bumps is mass-reflow soldered to a respective one of the curved sidewall recessed self-alignment features.
15. The electronic device of claim 13 , wherein a surface of at least one of the curved recessed self-alignment features is roughened at a location to be soldered.
16. The electronic device of claim 13 , wherein each of the bumps comprises a respective solder cap and is soldered to its respective one of the curved sidewall recessed self-alignment features utilizing more solder than included in the respective solder cap.
17. The electronic device of claim 13 , wherein at least one of the plurality of bond fingers comprises a plurality of respective curved sidewall recessed self-alignment features.