IP Library Granted Patent US 10,679,711
Granted Patent B2
US 10,679,711 · App. 16/055,593 · Granted Jun 9, 2020

Memory system including power supply control circuit and temperature sensor, and control method thereof

Inventor: Hajime Matsumoto (Higashimurayama, JP)
Assignee: Toshiba Memory Corporation
G11C16/30G11C5/147G11C7/04G11C11/4074
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Quick Facts
Patent No.
US 10,679,711
App. No.
16/055,593
Granted
Jun 9, 2020
Kind
B2
Abstract

According to one embodiment, a memory system includes first, second, and third ICs. The first IC includes a non-volatile semiconductor memory. The second IC includes a controller configured to control the non-volatile semiconductor memory. The third IC is configured to receive an external first power supply voltage and generate a second power supply voltage. The third IC is connected to the second IC via an interface according to a serial communication standard. A temperature sensor element is connected to the third IC.

Claims (45)

1. A memory system comprising:

a substrate;

a first integrated circuit provided on the substrate and comprising a non-volatile semiconductor memory;

a second integrated circuit provided on the substrate and comprising a controller configured to control the non-volatile semiconductor memory;

a third integrated circuit provided on the substrate and configured to receive a first power supply voltage supplied from an outside of the third integrated circuit and generate a second power supply voltage having a value different from a value of the first power supply voltage, wherein the third integrated circuit is connected to the second integrated circuit via an interface according to a serial communication standard and the third integrated circuit includes a terminal; and

a temperature sensor element provided on the substrate and connected to the terminal of the third integrated circuit.

2. The memory system according to claim 1 , wherein the third integrated circuit comprises:

a power supply circuit configured to generate power supply voltages for the non-volatile semiconductor memory and the controller;

a register configured to store temperature data sensed by means of the temperature sensor element; and

a communication circuit configured to transmit the temperature data stored in the register to the second integrated circuit via the interface.

3. The memory system according to claim 2 , wherein

the third integrated circuit comprises a converter configured to convert an analog temperature signal output from the temperature sensor element into the temperature data, and

the temperature sensor element is connected to the converter with a capacitor connected in parallel to the temperature sensor element.

4. The memory system according to claim 2 , wherein the third integrated circuit is configured to

receive the control signal transmitted from the second integrated circuit by the communication circuit,

control the power supply circuit based at least in part on the control signal received,

receive a request signal transmitted from the second integrated circuit by the communication circuit, and

transmit the temperature data stored in the register to the second integrated circuit by the communication circuit in response to the request signal received.

5. The memory system according to claim 2 , wherein the power supply circuit comprises:

a load switch configured to perform switching so that the first power supply voltage is supplied to a subsequent circuit or is not supplied to the subsequent circuit;

a linear regulator configured to convert an output of the load switch into a first internal power supply voltage; and

a converter configured to convert the output of the load switch into a second internal power supply voltage, and wherein

the second power supply voltage comprises the first internal power supply voltage and the second internal power supply voltage.

6. The memory system according to claim 1 , wherein

the substrate comprises a wiring pattern including plural pads, and

the temperature sensor element is mounted on one of the plural pads.

7. The memory system according to claim 1 , wherein the temperature sensor element comprises a diode or a bipolar transistor.

8. The memory system according to claim 1 , wherein the interface according to the serial communication standard comprises at least a first wiring configured to transmit a clock signal and a second wiring configured to transmit a data signal.

9. A power supply control circuit integrated and comprising a terminal to which a temperature sensor element is externally connected, the power supply control circuit comprising:

a power supply circuit configured to convert an external power supply voltage having a first value into an internal power supply voltage having a second value;

an analog to digital converter configured to convert an analog temperature signal supplied from the temperature sensor element into digital temperature data; and

a communication circuit configured to receive, via an interface according to a serial communication standard, a control signal to the power supply circuit supplied from an outside of the power supply control circuit and transmit, via the interface according to the serial communication standard, the temperature data to the outside of the power supply control circuit.

10. The power supply control circuit according to claim 9 , wherein the power supply circuit comprises:

a load switch configured to perform switching so that the external power supply voltage is supplied to a subsequent circuit or is not supplied to the subsequent circuit;

a linear regulator configured to convert an output of the load switch into a first internal power supply voltage; and

a direct-current to direct-current converter configured to convert the output of the load switch into a second internal power supply voltage, and wherein

the internal power supply voltage comprises the first internal power supply voltage and the second internal power supply voltage.

11. The power supply control circuit according to claim 9 , wherein the temperature sensor element is connected to the analog to digital converter with a capacitor connected in parallel to the temperature sensor element.

12. The power supply control circuit according to claim 9 , further comprising a resistor ( 78 ) configure to store the temperature data output from the analog to digital converter.

13. The power supply control circuit according to claim 9 , wherein the temperature sensor element comprises a diode or a bipolar transistor.

14. The power supply control circuit according to claim 9 , wherein the interface according to the serial communication standard comprises at least a first wiring configured to transmit a clock signal and a second wiring configured to transmit a data signal.

15. A control method of a memory system comprising a substrate; a first integrated circuit provided on the substrate and comprising a non-volatile semiconductor memory; a second integrated circuit provided on the substrate and comprising a controller configured to control the non-volatile semiconductor memory; a third integrated circuit provided on the substrate and configured to receive a first power supply voltage supplied from an outside of the third integrated circuit and generate a second power supply voltage having a value different from a value of the first power supply voltage, wherein the third integrated circuit is connected to the second integrated circuit via an interface according to a serial communication standard and the third integrated circuit includes a terminal; and a temperature sensor element provided on the substrate and connected to the terminal of the third integrated circuit, the control method comprising:

requesting, by the second integrated circuit, the third integrated circuit to transmit temperature data sensed by means of the temperature sensor element via the interface;

transmitting, by the third integrated circuit, the temperature data via the interface; and

transmitting, via the interface, by the second integrated circuit, a voltage adjusting signal in order to adjust a value of the second power supply voltage generated by the third integrated circuit based at least in part on the temperature data transmitted from the third integrated circuit.

Assignments (4)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2018
From: MATSUMOTO, HAJIME
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 046562/0820 →
Priority Claims (1)
JP 2018-053940 · Mar 22, 2018 · national
Continuity (1)
Related Publication 20190295663A1 · Sep 26, 2019
Cited By (1)
US 12,393,543