IP Library › Granted Patent US 10,573,399
Granted Patent B2
US 10,573,399 · App. 16/056,873 · Granted Feb 25, 2020

Three-dimensional one-time-programmable memory comprising dummy bit lines

Inventor: Guobiao Zhang (Corvallis, OR)
Assignees: HangZhou HaiCun Information Technology Co., Ltd.; Guobiao Zhang
G11C17/165G11C7/14G11C11/5692G11C13/004G11C13/0069G11C17/16G11C17/18G11C29/78G11C2013/0042G11C2013/0054G11C2013/0078G11C2213/71G11C2216/12
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Quick Facts
Patent No.
US 10,573,399
App. No.
16/056,873
Granted
Feb 25, 2020
Kind
B2
Abstract

A multi-bit-per-cell three-dimensional read-only memory (3D-OTP MB ) comprises a plurality of dummy bit lines. It comprises a plurality of OTP cells stacked above a semiconductor substrate. Each OTP array comprises at least four dummy bit lines.

Claims (14)

1. A multi-bit-per-cell three-dimensional read-only memory (3D-OTP MB ) with at least three states including first, second and third states, comprising:

a semiconductor substrate with transistors thereon;

an OTP array stacked above said semiconductor substrate, comprising:

a plurality of data OTP cells including a first data OTP cell in said first state, a second data OTP cell in said second state, and a third data OTP cell in said third state;

a first dummy OTP cell in said first state and a first dummy bit line associated therewith;

a second dummy OTP cell in said second state and a second dummy bit line associated therewith;

a third dummy OTP cell in said second state and a third dummy bit line associated therewith;

a fourth dummy OTP cell in said third state and a fourth dummy bit line associated therewith;

a plurality of contact vias coupling said OTP array to said semiconductor substrate;

a first differential amplifier on said semiconductor substrate, said first differential amplifier having a first input coupled with said first and second dummy bit lines, having a second input coupled with a first selected one of said data OTP cells;

a second differential amplifier on said semiconductor substrate, said second differential amplifier having a third input coupled with said third and fourth dummy bit lines, having a fourth input coupled with a second selected one of said data OTP cells;

wherein said first data OTP cell and said first dummy OTP cell are unprogrammed; said second data OTP cell, said second dummy OTP Cell and said third dummy OTP cell are programmed by a first programming current; and, said third data OTP cell and said fourth dummy OTP cell are programmed by a second programming current different from said first programming current.

2. The 3D-OTP MB according to claim 1 , wherein said second data OTP cell has a larger resistance than said third data OTP cell.

3. The 3D-OTP MB according to claim 1 , wherein said first programming current is smaller than said second programming current.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2025
From: ZHANG, GUOBIAO, DR.
To: HANGZHOU HAICUN INFORMATION TECHNOLOGY CO., LTD.
Reel/Frame 070917/0073 →
Priority Claims (2)
CN 2016 1 0238012 · Apr 14, 2016 · national
CN 2018 1 0872935 · Aug 2, 2018 · national
Continuity (2)
Division 15488435 · Apr 14, 2017
Related Publication 20180342307A1 · Nov 29, 2018