Scanning display with increased uniformity
A light assembly can have an array of light sources forming rows and columns, where the array comprises a plurality of chips, and each chip comprises a subarray of light sources forming the rows and columns. A boundary between chips in the array can be configured to extend diagonally across rows and columns of the array such that, for each column across which the boundary extends, the first row of the plurality rows may not have a light source disposed in the respective column, but a second row of the plurality of rows has a light source disposed in the respective column.
1. A system comprising:
a light assembly comprising:
a plurality of chips; and
an array of light sources disposed on the plurality of chips and forming rows and columns such that each chip of the plurality of chips comprises a respective portion of the array spanning two or more of the rows and two or more of the columns, wherein a boundary between a first chip and a second chip of the plurality of chips extends diagonally across a plurality of the rows of the array and a plurality of the columns of the array such that, for each column of the plurality of the columns of the array:
a first row of the plurality of the rows does not have a light source disposed in the respective column; and
a second row of the plurality of the rows has a light source disposed in the respective column;
a mirror configured to rotate about an axis to reflect light emitted by the array of light sources toward an output; and
controller circuitry configured to coordinate rotation of the mirror and emission of light from the array of light sources to create an output light pattern at the output during a scanning period.
2. The system of claim 1 , wherein each chip of the plurality of chips comprises one or more on-chip blank regions, disposed entirely on the respective chip, in which no light sources used during the scanning period are disposed.
3. The system of claim 2 , wherein:
the boundary extends diagonally across the plurality of the rows of the array and the plurality of the columns of the array at an angle and width, and
each of the one or more on-chip blank regions have substantially the same angle and substantially the same width as the boundary.
4. The system of claim 2 , wherein each of the one or more on-chip blank regions corresponds to locations on a respective chip of the plurality of chips at which an electrode for two or more light sources of the array of light sources is disposed.
5. The system of claim 1 , wherein the rows of the array of light sources comprise two or more subsets of rows that are offset such that a first plurality of light sources in a first subset of rows forms a first subset of columns of the columns of the array of light sources, and a second plurality of light sources in a second subset of rows forms a second subset of columns of the columns of the array of light sources, wherein the second subset of columns is offset from the first subset of columns.
6. The system of claim 5 , wherein the first subset of rows comprises even rows in the rows of the array of light sources, and the second subset of rows comprises odd rows in the rows of the array of light sources.
7. The system of claim 5 , wherein the first subset of rows comprises a first group of adjacent rows in the rows of the array of light sources, and the second subset of rows comprises a second group of adjacent rows in the rows of the array of light sources.
8. The system of claim 1 , wherein each chip of the plurality of chips is substantially non-rectangular, parallelogram shaped.
9. The system of claim 8 , wherein an angle of the boundary between the first chip and the second chip of the plurality of chips with respect to the array is such that each column of the plurality of the columns of the array has a same number of light sources available to illuminate each pixel of a respective column of pixels of the output light pattern during the scanning period as each other column of the plurality of the columns of the array.
10. A method comprising:
illuminating a mirror with a light assembly comprising a plurality of chips and an array of light sources disposed on the plurality of chips and forming rows and columns such that each chip of the plurality of chips comprises a respective portion of the array spanning two or more of the rows and two or more of the columns, wherein:
a boundary between a first chip and a second chip of the plurality of chips extends diagonally across a plurality of the rows of the array and a plurality of the columns of the array such that, for each column of the plurality of the columns of the array:
a first row of the plurality of the rows does not have a light source disposed in the respective column; and
a second row of the plurality of the rows has a light source disposed in the respective column; and
the mirror is configured to rotate about an axis to reflect light emitted by the array of light sources toward an output; and
controlling rotation of the mirror and emission of light from the array of light sources to create an output light pattern at the output during a scanning period.
11. The method of claim 10 , wherein the rows of the array of light sources comprises two or more subsets of rows that are offset such that a first plurality of light sources in a first subset of rows forms a first subset of columns of the columns of the array of light sources, and a second plurality of light sources in a second subset of rows forms a second subset of columns of the columns of the array of light sources, wherein the second subset of columns is offset from the first subset of columns.
12. The method of claim 11 , wherein the first subset of rows comprises even rows in the rows of the array of light sources, and the second subset of rows comprises odd rows in the rows of the array of light sources.
13. The method of claim 10 , wherein each chip of the plurality of chips comprises one or more on-chip blank regions, disposed entirely on the respective chip, in which no light sources used during the scanning period are disposed.
14. The method of claim 10 , wherein controlling the rotation of the mirror and the emission of light from the array of light sources further comprises controlling the rotation of the mirror and the emission of light such each pixel of a column of pixels in the output light pattern is illuminated by light sources respective rows of a corresponding column of the array of light sources during the scanning period.
15. A light assembly comprising:
an array of light sources forming rows and columns, wherein the array comprises a plurality of chips, each chip of the plurality of chips comprising a subarray of the light sources, and each subarray forming a respective portion of two or more of the rows and two or more of the columns of the array; and wherein:
a boundary between a first chip and a second chip of the plurality of chips extends diagonally across a plurality of the rows of the array and a plurality of the columns of the array such that, for each column of the plurality of the columns of the array:
a first row of the plurality of the rows does not have a light source disposed in the respective column; and
a second row of the plurality of the rows has a light source disposed in the respective column.
16. The light assembly of claim 15 , wherein each chip of the plurality of chips comprises one or more on-chip blank regions, disposed entirely on the respective chip, in which no light sources used during a scanning period are disposed.
17. The light assembly of claim 16 , wherein:
the boundary extends diagonally across the plurality of the rows of the array and the plurality of the columns of the array at an angle and width, and
each of the one or more on-chip blank regions have substantially the same angle and substantially the same width as the boundary.
18. The light assembly of claim 16 , wherein each of the one or more on-chip blank regions corresponds to locations on a respective chip of the plurality of chips at which an electrode for two or more light sources of the array of light sources is disposed.
19. The light assembly of claim 15 , wherein the rows of the array of light sources comprise two or more subsets of rows that are offset such that a first plurality of light sources in a first subset of rows forms a first subset of columns of the columns of the array of light sources, and a second plurality of light sources in a second subset of rows forms a second subset of columns of the columns of the array of light sources, wherein the second subset of columns is offset from the first subset of columns.
20. The light assembly of claim 15 , wherein each chip of the plurality of chips is substantially non-rectangular, parallelogram shaped.