IP Library › Granted Patent US 11,237,437
Granted Patent B2
US 11,237,437 · App. 16/080,119 · Granted Feb 1, 2022

Display panel and manufacture method thereof, and display apparatus

Inventors: Le Sun (Beijing, CN); Wei Zhang (Beijing, CN); Wulijibaier Tang (Beijing, CN); Zhengwen Pan (Beijing, CN); Tianlei Shi (Beijing, CN); Xiaojie Wang (Beijing, CN)
Assignees: BOE TECHNOLOGY GROUP CO., LTD.; ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
G02F1/136204G02F1/13338G02F1/133388G02F1/133512G06F3/0412H01L27/3253H01L51/0096G02F1/1339G02F1/1368G02F2201/48G06F3/044G06F2203/04107H01L21/02367H01L23/5385H01R13/6461H01S5/0216
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,237,437
App. No.
16/080,119
Granted
Feb 1, 2022
Kind
B2
Abstract

A display panel and a manufacture method thereof, and a display apparatus are provided. The display panel includes a first substrate and a second substrate which arranged opposite to each other. The first substrate includes a display region and a peripheral region, a conduction section is in the peripheral region of the first substrate, and the conduction section is electrically connected with a grounded section. The second substrate includes a display region and a peripheral region, a black matrix is at least in the peripheral region of the second substrate, and the black matrix is electrically connected with the conduction section.

Claims (45)

1. A display panel, comprising:

a first substrate and a second substrate, arranged opposite to each other,

wherein the first substrate comprises a display region and a peripheral region, a conduction section is in the peripheral region of the first substrate, and the conduction section is electrically connected with a grounded section; and

the second substrate comprises a display region and a peripheral region, wherein a black matrix is at least in the peripheral region of the second substrate, and the black matrix is electrically connected with the conduction section,

wherein the conduction section comprises at least one first conductive layer, and the at least one first conductive layer is respectively in a same layer as a conductive layer in the display region of the first substrate,

wherein the conductive layer in the display region of the first substrate comprises a light shielding layer, and the first conductive layer is in a same layer as the light shielding layer.

2. The display panel according to claim 1 , wherein a thickness of the first conductive layer in the peripheral region of the first substrate is greater than a thickness of a conductive layer, which is in a same layer as the first conductive layer, in the display region of the first substrate, and

the first conductive layer is electrically connected with the black matrix.

3. The display panel according to claim 1 , wherein the black matrix is further in the display region of the second substrate, and

a thickness of the black matrix in the peripheral region of the second substrate is greater than a thickness of the black matrix in the display region of the second substrate.

4. The display panel according to claim 3 , wherein the conduction section is around the peripheral region of the first substrate and forms an enclosed shape, a portion of the black matrix in the peripheral region of the second substrate forms another enclosed shape, and the conduction section is in contact with the black matrix.

5. The display panel according to claim 4 , wherein the second substrate further comprises a planarization layer in the display region of the second substrate, the planarization layer covers the black matrix in the display region of the second substrate, and

the thickness of the black matrix in the peripheral region of the second substrate is equal to a sum of the thickness of the black matrix in the display region of the second substrate and a thickness of the planarization layer.

6. The display panel according to claim 1 , further comprising a sealant, wherein the sealant is on a side of the conduction section facing the display region of the first substrate.

7. The display panel according to claim 1 , further comprising a conductive adhesive, wherein the conduction section is electrically connected with the grounded section via the conductive adhesive.

8. The display panel according to claim 1 , wherein the display panel is a fully embedded capacitive touch screen.

9. A display apparatus, comprising the display panel according to claim 1 .

10. The display apparatus according to claim 9 , further comprising a metal frame, wherein the grounded section comprises the metal frame.

11. A manufacture method of a display panel, comprising:

providing a first substrate; and

providing a second substrate and positioning the second substrate opposite to the first substrate,

wherein the first substrate comprises a display region and a peripheral region, a conduction section is in the peripheral region of the first substrate, and the conduction section is electrically connected with a grounded section; and

the second substrate comprises a display region and a peripheral region, wherein a black matrix is at least in the peripheral area of the second substrate, and the black matrix is electrically connected with the conduction section,

wherein the conduction section comprises at least one first conductive layer, and the at least one first conductive layer is respectively in a same layer as a conductive layer in the display region of the first substrate,

wherein the conductive layer in the display region of the first substrate comprises a light shielding layer, and the first conductive layer is in a same layer as the light shielding layer.

12. A display panel, comprising:

a first substrate and a second substrate, arranged opposite to each other,

wherein the first substrate comprises a display region and a peripheral region, a conduction section is in the peripheral region of the first substrate, and the conduction section is electrically connected with a grounded section; and

the second substrate comprises a display region and a peripheral region, wherein a black matrix is at least in the peripheral region of the second substrate, and the black matrix is electrically connected with the conduction section,

wherein the conduction section comprises at least one first conductive layer, and the at least one first conductive layer is respectively in a same layer as a conductive layer in the display region of the first substrate,

a thin film transistor is in the display region of the first substrate, the thin film transistor comprises a gate electrode and a source/drain electrode, and

the first conductive layer is in a same layer as a metal layer where the source/drain electrode is located.

13. The display panel according to claim 12 , wherein the conduction section further comprises an insulating layer and a second conductive layer,

the insulating layer covers the first conductive layer, the second conductive layer is electrically connected with the first conductive layer through at least one via hole in the insulating layer, and

the second conductive layer is electrically connected with the black matrix.

14. The display panel according to claim 13 , wherein the first substrate further comprises a pixel electrode, and the second conductive layer is in a same layer as the pixel electrode; or

the first substrate further comprises a common electrode, and the second conductive layer is in a same layer as the common electrode.

15. The display panel according to claim 12 , wherein the black matrix is further in the display region of the second substrate, and

a thickness of the black matrix in the peripheral region of the second substrate is greater than a thickness of the black matrix in the display region of the second substrate.

16. The display panel according to claim 15 , wherein the conduction section is around the peripheral region of the first substrate and forms an enclosed shape, a portion of the black matrix in the peripheral region of the second substrate forms another enclosed shape, and the conduction section is in contact with the black matrix.

17. The display panel according to claim 16 , wherein the second substrate further comprises a planarization layer in the display region of the second substrate, the planarization layer covers the black matrix in the display region of the second substrate, and

the thickness of the black matrix in the peripheral region of the second substrate is equal to a sum of the thickness of the black matrix in the display region of the second substrate and a thickness of the planarization layer.

18. The display panel according to claim 12 , further comprising a sealant, wherein the sealant is on a side of the conduction section facing the display region of the first substrate.

19. The display panel according to claim 12 , further comprising a conductive adhesive, wherein the conduction section is electrically connected with the grounded section via the conductive adhesive.

20. The display panel according to claim 12 , wherein the display panel is a fully embedded capacitive touch screen.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2018
From: SUN, LE
To: BOE TECHNOLOGY GROUP CO., LTD.; ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
Reel/Frame 046713/0339 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2018
From: ZHANG, WEI
To: BOE TECHNOLOGY GROUP CO., LTD.; ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
Reel/Frame 046713/0404 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2018
From: TANG, WULIJIBAIER
To: BOE TECHNOLOGY GROUP CO., LTD.; ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
Reel/Frame 046713/0542 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2018
From: PAN, ZHENGWEN
To: BOE TECHNOLOGY GROUP CO., LTD.; ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
Reel/Frame 046713/0640 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2018
From: SHI, TIANLEI
To: BOE TECHNOLOGY GROUP CO., LTD.; ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
Reel/Frame 046713/0740 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2018
From: WANG, XIAOJIE
To: BOE TECHNOLOGY GROUP CO., LTD.; ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
Reel/Frame 046713/0814 →
Priority Claims (1)
CN 201720762032.4 · Jun 27, 2017 · national
Continuity (1)
Related Publication 20210191201A1 · Jun 24, 2021